поискавой системы для электроныых деталей |
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DRV10974 датащи(PDF) 11 Page - Texas Instruments |
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DRV10974 датащи(HTML) 11 Page - Texas Instruments |
11 / 29 page 100% peak output 50% peak output VM VM/2 100% PWM input 50% PWM input pk dc CC Vph PWM V u PWM output Average value U-V V-W W-U U V W Sinusoidal Voltage from Phase to Phase Sinusoidal Voltage from Phase to GND With 3 rd-Order Harmonics 11 DRV10974 www.ti.com SLVSDN2 – JANUARY 2018 Product Folder Links: DRV10974 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Feature Description (continued) Figure 4. Sinusoidal Voltage Figure 5. PWM Encoded Phase Output and the Average Value The output amplitude is determined by the supply voltage (VCC) and the PWM-commanded duty cycle (PWM) as calculated in Equation 1 and shown in Figure 6. The maximum amplitude is applied when the commanded PWM duty cycle is slightly less than 100% in order to keep the 25-kHz PWM rate. (1) Figure 6. Output Voltage Amplitude Adjustment The motor speed is controlled indirectly by using the PWM command to control the amplitude of the phase voltages which are applied to the motor. The PWM pin can be driven by either a digital duty cycle or an analog voltage. The duty cycle of the PWM input (PWM) is passed through a low-pass filter that ramps from 0% to 100% duty cycle in 120 ms. The control resolution is approximately 0.2%. The signal path from PWM input to PWM motor is shown in Figure 7. |
Аналогичный номер детали - DRV10974 |
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Аналогичное описание - DRV10974 |
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