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DRV10974 датащи(PDF) 12 Page - Texas Instruments |
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DRV10974 датащи(HTML) 12 Page - Texas Instruments |
12 / 29 page (FG) ¦ RPM pole _ pairs u 0 1.5% 15% 15% Input Duty Cycle Duty cycle clamp Duty cycle off Rising duty cycle PWM Input Amplitude of Output Sine Wave PWM Output LPF 12 DRV10974 SLVSDN2 – JANUARY 2018 www.ti.com Product Folder Links: DRV10974 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Figure 7. PWM Command Input Control Diagram The output peak amplitude is described by Equation 1 when PWMdc > 15% (the minimum-operation duty cycle). When the PWM-commanded duty cycle is lower than the minimum-operation duty cycle and higher than 1.5%, the output is controlled the by the minimum-operation duty cycle (DCMIN_F). This is shown in Figure 8 for analog input, and for pulse durations greater than 120 ns for digital input. If the supply voltage (VVCC) > 14 V, the maximum PWMDC is limited to 14 V/VVCC. Figure 8. Speed-Control Transfer Function 7.3.2 Motor Direction Change The DRV10974 device can be easily configured to drive the motor in either direction by setting the input on the FR (forward-reverse) pin to a logic 1 or logic 0 state. The direction of commutation as described by the commutation sequence is defined as follows: FR = 0 U →V→W FR = 1 U →W→V 7.3.3 Motor-Frequency Feedback (FG) During operation of the DRV10974 device, the FG pin provides an indication of the speed of the motor. The FG pin toggles at a rate of one time during an electrical cycle. Using this information and the number of pole pairs in the motor, use Equation 2 to calculate the mechanical speed of the motor. (2) During open-loop acceleration the FG pin indicates the frequency of the signal that is driving the motor. The lock condition of the motor is unknown during open-loop acceleration and therefore the FG pin could toggle during this time even though the motor is not moving. |
Аналогичный номер детали - DRV10974 |
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Аналогичное описание - DRV10974 |
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