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74LVTH16374DGGRG4 датащи(PDF) 4 Page - Texas Instruments |
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74LVTH16374DGGRG4 датащи(HTML) 4 Page - Texas Instruments |
4 / 18 page www.ti.com 1OE 1CLK 1D1 To Seven Other Channels 1Q1 2OE 2CLK 2D1 2Q1 To Seven Other Channels 1 48 47 24 25 36 C1 1D 13 2 C1 1D Pin numbers shown are for the DGG, DL, and WD packages. Absolute Maximum Ratings (1) SN54LVTH16374 ,, SN74LVTH16374 3.3-V ABT 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCBS145Q – MAY 1992 – REVISED DECEMBER 2006 LOGIC DIAGRAM (POSITIVE LOGIC) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.5 4.6 V VI Input voltage range(2) –0.5 7 V VO Voltage range applied to any output in the high-impedance or power-off state(2) –0.5 7 V VO Voltage range applied to any output in the high state(2) –0.5 VCC + 0.5 V SN54LVTH16374 96 IO Current into any output in the low state mA SN74LVTH16374 128 SN54LVTH16374 48 IO Current into any output in the high state(3) mA SN74LVTH16374 64 IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA DGG package 70 DL package 63 θ JA Package thermal impedance(4) °C/W GQL/ZQL package 42 GRD/ZRD package 36 Tstg Storage temperature range –65 150 °C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. (3) This current flows only when the output is in the high state and VO > VCC. (4) The package thermal impedance is calculated in accordance with JESD 51-7. 4 Submit Documentation Feedback |
Аналогичный номер детали - 74LVTH16374DGGRG4 |
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Аналогичное описание - 74LVTH16374DGGRG4 |
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