TPS2398

TPS2399

SLUS562A − JUNE 2003 − REVISED SEPTEMBER 2003

5

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DETAILED PIN DESCRIPTIONS

EN: Enable input to turn on/off power to the load. The EN pin is referenced to the −VIN potential of the circuit.

When this input is pulled high (above the nominal 1.4-V threshold) the device enables the GATE output, and

begins the ramp of current to the load. When this input is low, the linear current amplifier (LCA) is disabled, and

a large pull-down device is applied to the FET gate, disabling power to the load.

FLTTIME: Connection for user-programming of the fault timeout period. An external capacitor connected from

FLTTIME to −VIN establishes the timeout period to declare a fault condition. This timeout protects against

indefinite current sourcing into a faulted load, and also provides a filter against nuisance trips from momentary

current spikes or surges. The TPS2398 and TPS2399 define a fault condition as voltage at the ISENS pin at

or greater than the 40-mV fault threshold. When a fault condition exists, the timer is active. The devices manage

fault timing by charging the external capacitor to the 4-V fault threshold, then subsequently discharging it to reset

the timer (TPS2398), or discharging it at approximately 1% the charge rate to establish the duty cycle for retrying

the load (TPS2399). Whenever the internal fault latch is set (timer expired), the pass FET is rapidly turned off,

and the PG output is deasserted.

GATE: Gate drive for external N-channel FET. When enabled, and the input supply is above the UVLO

threshold, the gate drive is enabled and the device begins charging an external capacitor connected to the

IRAMP pin. This pin voltage is used to develop the reference voltage at the non-inverting input of the internal

LCA. The inverting input is connected to the current sense node, ISENS. The LCA acts to slew the pass FET

gate to force the ISENS voltage to track the reference. The reference is internally clamped at 40 mV, so the

maximum current that can be sourced to the load is determined by the sense resistor value as IMAX

≤ 40

LCA drives the GATE output to about 14 V to fully enhance the pass FET, completing the low-impedance supply

return path for the load.

IRAMP: Programming input for setting the inrush current slew rate. An external capacitor connected between

this pin and −VIN establishes the load current slew rate whenever power to the load is enabled. The device

charges the external capacitor to establish the reference input to the LCA. The closed-loop control of the LCA

and pass FET acts to maintain the current sense voltage at ISENS at the reference potential. Since the sense

voltage is developed as the drop across a resistor, the charging current ramp rate is set by the voltage ramp

rate at the IRAMP pin. When the output is disabled via the EN input or due to a load fault, the capacitor is

discharged and held low to initialize for the next turn-on.

ISENS: Current sense input. An external low value resistor connected between this pin and −VIN is used to feed

back current magnitude information to the TPS2398/99. There are two internal device thresholds associated

with the voltage at the ISENS pin. During charging of the load’s input capacitance, or during other periods of

excessive demand, the HSPM acts to limit this voltage to 40 mV. Whenever the LCA is in current regulation

mode, the capacitor at FLTTIME is charged to activate the timer. If, when the LCA is driving to its supply rail,

a fast-acting fault such as a short-circuit, causes the ISENS voltage to exceed 100 mV (the overload threshold),

the GATE pin is pulled low rapidly, bypassing the fault timer.

PG: Open-drain, active-low indication of load power good. A power good status is declared when the output

is enabled, the GATE pin voltage has ramped to at least 7 V, and the voltage on the IRAMP pin exceeds

approximately 5 V. This last condition assures that full programmed sourcing current is available prior to

declaring power good, even with very slow current ramp rates. This additional protection prevents potential

discharging of the module input bulk capacitance during load turn-on.

RTN: Positive supply input for the TPS2398/99. For negative voltage systems, the supply pin connects directly

to the return node of the input power bus. Internal regulators step down the input voltage to generate the various

supply levels used by the TPS2398 and TPS2399.

−VIN: Negative supply input and reference pin for the TPS2398/99. This pin connects directly to the input supply

negative rail. The input and output pins and all internal circuitry are referenced to this pin, so it is essentially the

GND or VSS pin of the device.