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CY7C1663KV18 датащи(PDF) 23 Page - Cypress Semiconductor |
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CY7C1663KV18 датащи(HTML) 23 Page - Cypress Semiconductor |
23 / 31 page Document Number: 001-44060 Rev. *O Page 23 of 31 CY7C1663KV18/CY7C1665KV18 AC Electrical Characteristics Over the Operating Range Parameter [29] Description Test Conditions Min Typ Max Unit VIH Input high voltage VREF + 0.2 – VDDQ + 0.24 V VIL Input low voltage -0.24 – VREF – 0.2 V Capacitance Parameter [30] Description Test Conditions Max Unit CIN Input capacitance TA = 25 °C, f = 1 MHz, VDD = 1.8 V, VDDQ = 1.5 V 4 pF CO Output capacitance 4pF Thermal Resistance Parameter [30] Description Test Conditions 165-ballFBGA Package Unit JA (0 m/s) Thermal resistance (Junction to Ambient) Socketed on a 170 × 220 × 2.35 mm, eight-layer printed circuit board 12.23 °C/W JA (1 m/s) 11.17 °C/W JA (3 m/s) 10.42 °C/W JB Thermal resistance (Junction to Board) 9.34 °C/W JC Thermal resistance (Junction to Case) 2.10 °C/W AC Test Loads and Waveforms Figure 5. AC Test Loads and Waveforms 1.25 V 0.25 V R = 50 5pF INCLUDING JIG AND SCOPE ALL INPUT PULSES Device RL = 50 Z0 = 50 VREF = 0.75 V VREF = 0.75 V [31] 0.75 V Under Test 0.75 V Device Under Test OUTPUT 0.75 V VREF VREF OUTPUT ZQ ZQ (a) Slew Rate = 2 V/ns RQ = 250 (b) RQ = 250 Notes 29. Overshoot: VIH(AC) < VDDQ + 0.35 V (Pulse width less than tCYC/2), Undershoot: VIL(AC) > 0.3 V (Pulse width less than tCYC/2). 30. Tested initially and after any design or process change that may affect these parameters. 31. Unless otherwise noted, test conditions are based on signal transition time of 2 V/ns, timing reference levels of 0.75 V, Vref = 0.75 V, RQ = 250 , VDDQ = 1.5 V, input pulse levels of 0.25 V to 1.25 V, and output loading of the specified IOL/IOH and load capacitance shown in (a) of Figure 5. |
Аналогичный номер детали - CY7C1663KV18 |
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Аналогичное описание - CY7C1663KV18 |
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