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TC58FVT160AXB-70 датащи(PDF) 7 Page - Toshiba Semiconductor

номер детали TC58FVT160AXB-70
подробное описание детали  TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
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производитель  TOSHIBA [Toshiba Semiconductor]
домашняя страница  http://www.semicon.toshiba.co.jp/eng
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TC58FVT160AXB-70 датащи(HTML) 7 Page - Toshiba Semiconductor

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TC58FVT160/B160AFT/AXB-70,-10
2002-08-06
7/41
Output Disable Mode
Inputting VIH to OE disables output from the device and sets DQ to High-Impedance.
Command Write
The TC58FVT160/B160A uses the standard JEDEC control commands for a single-power supply E2PROM. A
Command Write is executed by inputting the address and data into the Command Register. The command is
written by inputting a pulse to WE with CE = VIL and OE = VIH ( WE control). The command can also be
written by inputting a pulse to CE with WE = VIL ( CE control). The address is latched on the falling edge of
either WE or CE . The data is latched on the rising edge of either WE or CE . DQ0~DQ7 are valid for data
input and DQ8~DQ15 are ignored.
To abort input of the command sequence use the Reset command. The device will reset the Command Register
and enter Read Mode. If an undefined command is input, the Command Register will be reset and the device will
enter Read Mode.
Software Reset
Apply a software reset by inputting a Read/Reset command. A software reset returns the device from ID Read
Mode or CFI Mode to Read Mode, releases the lock state if automatic operation has ended abnormally, and clears
the Command Register.
Hardware Reset
A hardware reset initializes the device and sets it to Read Mode. When a pulse is input to RESET for tRP, the
device abandons the operation which is in progress and enters Read Mode after tREADY. Note that if a hardware
reset is applied during data overwriting, such as a Write or Erase operation, data at the address or block being
written to at the time of the reset will become undefined.
After a hardware reset the device enters Read Mode if RESET = VIH or Standby Mode if RESET = VIL. The
DQ pins are High-Impedance when RESET = VIL. After the device has entered Read Mode, Read operations
and input of any command are allowed.
Comparison between Software Reset and Hardware Reset
ACTION
SOFTWARE RESET
HARDWARE RESET
Releases ID Read Mode or CFI Mode.
True
True
Clears the Command Register.
True
True
Releases the lock state if automatic operation has ended abnormally.
True
True
Stops any automatic operation which is in progress.
False
True
Stops any operation other than the above and returns the device to
Read Mode.
False
True
/Word Mode
BYTE is used select Word Mode (16 bits) or Byte Mode (8 bits) for the TC58FVT160/B160A. If VIH is input to
BYTE , the device will operate in Word Mode. Read data or write commands using DQ0~DQ15. When VIL is
input to BYTE , read data or write commands using DQ0~DQ7. DQ15/A-1 is used as the lowest address.
DQ8~DQ14 will become High-Impedance.
BYTE


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