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AD7680 датащи(PDF) 7 Page - Analog Devices |
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AD7680 датащи(HTML) 7 Page - Analog Devices |
7 / 11 page –7– REV. PrE AD7680 PRELIMINARY TECHNICAL DATA TPC 7. AD7680 Typical DNL TBD CIRCUIT INFORMATION The AD7680 is a fast, low power, 16-bit, single supply, A/D converter. The part can be operated from a 2.5V to 5.25V supply. When operated from either a 5V or 3V supply, the AD7680 is capable of throughput rates of 100 kSPS when provided with a 2.5MHz clock. The AD7680 provides the user with an on-chip track/ hold, A/D converter, and a serial interface housed in a tiny 6-lead SOT-23 package or 8-ld MSOP package which offer the user considerable space saving advantages over alternative solutions. The serial clock input accesses data from the part and also provides the clock source for the successive-approximation A/D converter. The analog in- put range for the AD7680 is 0 to VDD. An external refer- ence is not required for the ADC, nor is there a reference on-chip. The reference for the AD7680 is derived from the power supply and thus gives the widest dynamic input range. The AD7680 also features a power-down option to save power between conversions. The power-down feature is implemented across the standard serial interface as de- scribed in the Modes of Operation section. CONVERTER OPERATION The AD7680 is a 16-bit, successive approximation ana- log-to -digital converter based around a capacitive DAC. The AD7680 can convert analog input signals in the range 0 V to VDD. Figures 2 and 3 show simplified schematics of the ADC. The ADC comprises of Control Logic, SAR and a Capacitive DAC, which are used to add and subtract fixed amounts of charge from the sampling capacitor to bring the comparator back into a balanced condition. Fig- ure 2 shows the ADC during its acquisition phase. SW2 is closed and SW1 is in position A. The comparator is held in a balanced condition and the sampling capacitor ac- quires the signal on the selected VIN channel. When the ADC starts a conversion, see figure 3, SW2 will open and SW1 will move to position B causing the com- parator to become unbalanced. The Control Logic and the Capacitive DAC are used to add and subtract fixed amounts of charge from the sampling capacitor to bring the comparator back into a balanced condition. When the comparator is rebalanced the conversion is complete. The Control Logic generates the ADC output code. Figure 4 shows the ADC transfer function. Figure 3. ADC Conversion Phase Figure 2. ADC Acquisition Phase CAPACITIVE DAC V IN COMPARATOR CONTROL LOGIC SW1 A B SW2 V DD /2 SAMPLING CAPACITOR ACQUISITION PHASE CAPACITIVE DAC V IN COMPARATOR CONTROL LOGIC SW1 A B SW2 V DD /2 SAMPLING CAPACITOR CONVERSION PHASE Analog Input Figure 4 shows an equivalent circuit of the analog input structure of the AD7680. The two diodes D1 and D2 provide ESD protection for the analog inputs. Care must be taken to ensure that the analog input signal never ex- ceeds the supply rails by more than 300mV. This will cause these diodes to become forward biased and start conducting current into the substrate. 10mA is the maxi- mum current these diodes can conduct without causing irreveversible damage to the part. The capacitor C1 in Figure 4 is typically about 4pF and can primarily be at- tributed to pin capacitance. The resistor R1 is a lumped component made up of the on resistance of a switch (track VIN D1 VDD D2 R1 C2 30PF C1 4PF CONVERSION PHASE - SWITCH OPEN TRACK PHASE - SWITCH CLOSED Figure 4. Equivalent Analog Input Circuit |
Аналогичный номер детали - AD7680 |
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Аналогичное описание - AD7680 |
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