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CD4046B датащит (Datasheet) 1 Page - Silicon Supplies

№ деталь CD4046B
подробность  CMOS High Voltage Logic
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производитель  SS [Silicon Supplies]
домашняя страница  https://siliconsupplies.com/

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 CMOS High Voltage Logic – CD4046B
CMOS Micropower Phase Locked Loop (PLL) in bare die form
Rev 1.0
Choice of two Phase Comparators:
The CD4046B phase locked loop consists of two
phase comparators, a voltage-controlled oscillator
(VCO), source follower and zener diode. The
comparators have a common signal input amplifier and
common comparator input. The zener diode is used
for power supply regulation if required.  Applications
include FM and FSK modulation / demodulation,
frequency synthesis and multiplication, frequency
discrimination, tone decoding, data synchronization
and conditioning, voltage-to-frequency conversion and
motor speed control.
Exclusive Or Gate, duty cycle limited
Rising edge switching, duty cycle unlimited
Buffered outputs compatible with MHTL and Low
power TTL
VCO inhibit control for ON-OFF keying and ultra-
low standby power consumption
Source-follower output of VCO control input
Integrated zener diode to assist supply regulation
Supply voltage range: 3V to 18V
Symmetrical output characteristics
The followi
ng part suffixes apply:
No suffix - MIL-STD-883 /2010B Visual Inspection
Ordering Information
Die Dimensions in µm (mils)
1930 (76)
“H” - MIL-STD-883 /2010B Visual Inspection
+ MIL-PRF-38534 Class H LAT
“K” - MIL-STD-883 /2010A Visual Inspection (Space)
+ MIL-PRF-38534 Class K LAT
LAT = Lot Acceptance Test.
For further information on LAT process flows see below.
Supply Formats:
1930 x 2210
Die Size (Unsawn)
76 x 87
106 x 106
Minimum Bond Pad Size
4.17 x 4.17
635 (±20)
Die Thickness
25 (±0.79)
Mechanical Specification
Default – Die in Waffle Pack (100 per tray capacity)
Sawn Wafer on Tape – On request
Unsawn Wafer – On request
Die Thickness <> 635µm(25 Mils) – On request
Top Metal Composition
Al 1%Si 1.1µm
Assembled into Ceramic Package – On request
Back Metal Composition
N/A – Bare Si
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