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CD4070B датащит (Datasheet) 3 Page - Silicon Supplies

№ деталь CD4070B
подробность  CMOS High Voltage Logic
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производитель  SS [Silicon Supplies]
домашняя страница  https://siliconsupplies.com/
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CMOS High Voltage Logic – CD4070B
Rev 1.0
15/03/18
PARAMETER
SYMBOL
MIN
MAX
UNITS
Supply Voltage
VDD
3.0
18
V
DC Input Voltage, Output Voltage
VIN, VOUT
0
VDD
V
Operating Temperature Range
TJ
-55
+125
°C
Recommended Operating Conditions3 (Voltages referenced to V
SS)
Absolute Maximum Ratings1
PARAMETER
SYMBOL
VALUE
UNIT
DC Supply Voltage (Referenced to VSS)
VDD
-0.5 to +20
V
DC Input or Output Voltage (Referenced to VSS)
VIN, VOUT
-0.5 to VDD +0.5
V
Storage Temperature Range
TSTG
-65 to 150
°C
Input Current or Output Current (per Pad)
IIN, IOUT
±10
mA
Power Dissipation in Still Air
2
PD
750
mW
 
LIMITS
PARAMETER
SYMBOL
VDD
CONDITIONS
25°C
85°C
FULL RANGE
4
UNITS
5V
VIN = 0 or VDD
4.95
4.95
4.95
10V
VIN = 0 or VDD
9.95
9.95
9.95
Minimum High-Level
Output Voltage
VOH
15V
VIN = 0 or VDD
14.95
14.95
14.95
V
5V
VIN = VDD or 0
0.05
0.05
0.05
10V
VIN = VDD or 0
0.05
0.05
0.05
Maximum Low-Level
Output Voltage
VOL
15V
VIN = VDD or 0
0.05
0.05
0.05
V
5V
VO = 0.5 or 4.5V
3.5
3.5
3.5
10V
VO = 1.0 or 9.0V
7.0
7.0
7.0
Minimum High-Level
Input Voltage
VIH
15V
VO = 1.5 or 13.5V
11
11
11
V
5V
VO = 4.5 or 0.5V
1.5
1.5
1.5
10V
VO = 9.0 or 1.0V
3.0
3.0
3.0
Maximum Low-Level
Input Voltage
VIL
15V
VO = 13.5 or 1.5V
4.0
4.0
4.0
V
5V
VOH = 2.5V
-3.0
-2.4
-1.7
5V
VOH = 4.6V
-0.64
-0.51
-0.36
10V
VOH = 9.5V
-1.6
-1.3
-0.9
Minimum Output
(Source) Current
IOH
15V
VOH = 13.5V
-4.2
-3.4
-2.4
mA
 
4. -55˚C ≤ TJ ≤ +125˚C.
DC Electrical Characteristics (Voltages referenced to V
SS)
3.  This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken
to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be
constrained to the range VSS ≤ (VIN or VOUT) ≤ VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD).
Unused outputs must be left open.
1.  Operation above the absolute maximum rating may cause device failure. Operation at the absolute maximum ratings, for extended periods, may
reduce device reliability. 2. Measured in plastic DIP package, results in die form are dependent on die attach and assembly method.




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