Si9160

Vishay Siliconix

Document Number: 70029

S-40700—Rev. H, 19-Apr-04

www.vishay.com

9

Another benefit of powering from the output voltage is it

provides minimum load on the converter. This prevents the

converter from skipping frequency pulses typically referred to

as Burst or Pulse-Skipping modes. Pulse skipping mode could

be dangerous, especially if it generates noise in RF, IF, or

signal processing frequency bands.

Enable and Under Voltage Shutdown

The Si9160 is designed with programmable under-voltage

lockout and enable features. These features give designers

flexibility to customize the converter design. The

under-voltage lockout threshold is 1.2 V. With a simple resistor

allows remote shutdown as needed.

Gate Drive and MOSFETs

The gate drive section is designed to drive the high-side

p-channel switch and low-side n-channel switch. The internal

40 ns break-before-make (BBM) timing prevents both

MOSFETs from turning-on simultaneously. The BBM circuit

monitors both drive voltages, once the gate-to-source voltage

drops below 2.5 V, the other gate drive is delayed 40-ns before

it is allowed to drive the external MOSFET (see Figure 2 for

timing diagram). This smart gate drive control provides

additional assurance that shoot-through current will not occur.

FIGURE 2.

Gate Drive Timing Diagrams

CH1

CH3

CH2

CH4

The MOSFET used is the Si6801, an n- and p-channel in a

single package TSSOP-8. The Si6801 is optimized to have

very low gate charge and gate resistance. This results in a

great reduction in gate switching power losses. The average

time to switch on and off a MOSFET in a conventional structure

is about 20 ns. The Si6801 will switch on and off in < 5 ns, see

Figure 3.

N-Channel

Turn-Off

N-Channel

Turn-On

Note the Speed

These MOSFETs have switching speeds of <5 ns. This high speed is

due to the fast, high current output drive of the Si9160 and the opti-

mized gate charge of the Si6801.

FIGURE 3.

Gate Switching Times

5 ns/DIV, 2 V/DIV

5 ns/DIV, 2 V/DIV

Stability Components

A voltage mode boost converter is normally stabilized with

simple lag compensation due to the additional 90_ phase lag

introduced by the additional right hand plane zero, as well as

having a duty factor dependent resonant frequency for the

output filter. The stability components shown in Figure 1 have

been chosen to ensure stability under all battery conditions

while maintaining maximum transient response. To do this we

have used a 2-pole-zero pair configuration (type 3 amplifier

configuration). Figure 4 shows the bode plot for the above

circuit, maintaining > 50_ phase margin over the entire battery

voltage range.

FIGURE 4.

Stability, with 1-cell Li battery input, 5 V @ 600-mA

output.

Li Battery Volt-

age Full

Charge 4.0 V

Frequency (Hz)

Li Battery Voltage

Low Charge 2.7 V

+180_

−180_

Phase

Gain

Phase Margin

> 50_

0_

−50

+50

0