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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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BQ25619 датащи(PDF) 41 Page - Texas Instruments |
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BQ25619 датащи(HTML) 41 Page - Texas Instruments |
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41 / 59 page  41 BQ25619 www.ti.com SLUSDF8A – JUNE 2019 – REVISED JULY 2019 Product Folder Links: BQ25619 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated 8.5.11 Charger Status 2 Register (Address = 0Ah) Figure 34. REG0A Register 7 6 5 4 3 2 1 0 x x x x x x 0 0 R R R R R R R/W R/W LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 17. REG0A Field Descriptions Bit Field POR Type Reset Description 7 VBUS_GD x R NA 0 – VBUS does not pass poor source detection 1 – VBUS passes poor source detection 6 VINDPM_STAT x R NA 0 – Not in VINDPM 1 – In VINDPM 5 IINDPM_STAT x R NA 0 – Not in IINDPM 1 – In IINDPM 4 BATSNS_STAT x R NA 0 – BATSNS pin is in good connection. Regulation battery voltage through BATSNS pin. 1 – BATSNS pin is open/short. Regulate battery voltage through BAT pin. 3 TOPOFF_ACTIVE x R NA 0 – Top off timer not counting. 1 – Top off timer counting 2 ACOV_STAT x R NA 0 – Not in ACOV 1 – In ACOV 1 VINDPM_INT_ MASK 0 R/W by REG_RST Allow or block INT pulse assertion to host during VINDPM. 0 – INT is asserted to host during VINDPM (default) 1 – No INT pulse asserted to host during VINDPM 0 IINDPM_INT_ MASK 0 R/W by REG_RST Allow or block INT pulse assertion to host during IINDPM 0 – INT is asserted to host during IINDPM (default) 1 – No INT pulse asserted to host during IINDPM LEGEND: R/W = Read/Write; R = Read only |
Аналогичный номер детали - BQ25619_V01 |
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Аналогичное описание - BQ25619_V01 |
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