поискавой системы для электроныых деталей
Selected language     Russian  ▼
название детали
         подробно


CDCDB2000 датащит (Datasheet) 15 Page - Texas Instruments

Click here to check the latest version.
№ деталь CDCDB2000
подробность  CDCDB2000 DB2000QL-Compliant 20-Output Clock Buffer for PCIe Gen 1 to Gen 5
скачать  33 Pages
Scroll/Zoom Zoom In 100% Zoom Out
производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
Logo 

 15 page
background image
PWRGD
PD#
CKPWRGD_PD#
VDD/VDD_A
15
CDCDB2000
www.ti.com
SNAS787 – NOVEMBER 2019
Product Folder Links: CDCDB2000
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
Device Functional Modes (continued)
Figure 6. PWRGD and PD# State Changes
7.4.2 OE[12:5]# and SMBus Output Enables
Each output channel, 0 to 19, can be individually enabled or disabled by SMBus control register bits, called SMB
enable bits. Additionally, each output channel from 12 to 5 has a dedicated, corresponding, OE[12:5]# hardware
pin. The OE[12:5]# pins are asynchronously asserted-low signals that may enable or disable the output.
Refer to Table 2 for enabling and disabling outputs through the hardware and software. Note that both the SMB
enable bit must be a ‘1’ and the OEx# pin must be an input low voltage ‘0’ for the output channel to be active.
Table 2 is only valid when the SBEN signal is low (SBEN = 0).
Table 2. OE[12:5]# Functionality When SBEN = 0
INPUTS
OE[12:5]# HARDWARE PINS AND SMBus CONTROL REGISTER BITS
PWRGD
PD#
CLKIN
SMBus ENABLE BIT
(byte[2:0])
OE[12:5]#
CK[12:5]
CK[19:13, 4:0]
0
X
X
X
X
LOW
LOW
1
0
X
X
X
Tristate
Tristate
1
1
Running
0
X
0
0
1
1
Running
1
0
Running
Running
1
1
Running
1
1
0
Running
7.5 Programming
The CDCDB2000 has two methods to program the states of its 20 output drivers: SMBus and SBI.
To select between SMBus and SBI interfaces, the SBEN pin is used. Pulling the SBEN to a high level enables
the SBI. Pulling the SBEN pin to ground enables the SMBus interface. When SBI is enabled, the SMBus Mask
registers are active. The SMBus Mask registers allow the function of the SBI shift registers to be disabled and set
the each individual channel as enabled. See Figure 7 for a diagram of how the SMBus Mask registers and SBI
shift register interact to enable or disable each output.




Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33 


датащит скачать




ссылки URL

Вашему бизинису помогли Аллдатащит?  [ DONATE ]  

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность    |   закладка   |   обмен ссыками   |   поиск по производителю
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  , Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp  |   Russian : Alldatasheetru.com
Korean : Alldatasheet.co.kr   |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com  |   Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl