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DLPC900_V01 датащит (Datasheet) 2 Page - Texas Instruments

№ деталь DLPC900_V01
подробность  DLPC900 Digital Controller for Advanced Light Control
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
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DLPC900
DLPS037D – OCTOBER 2014 – REVISED MARCH 2019
www.ti.com
Product Folder Links: DLPC900
Submit Documentation Feedback
Copyright © 2014–2019, Texas Instruments Incorporated
Table of Contents
1
Features .................................................................. 1
2
Applications ........................................................... 1
3
Description ............................................................. 1
4
Revision History..................................................... 2
5
Pin Configuration and Functions ......................... 4
6
Specifications....................................................... 22
6.1
Absolute Maximum Ratings ................................... 22
6.2
ESD Ratings............................................................ 22
6.3
Recommended Operating Conditions ..................... 23
6.4
Thermal Information ................................................ 23
6.5
Electrical Characteristics......................................... 24
6.6
System Oscillators Timing Requirements .............. 26
6.7
Power-Up and Power-Down Timing Requirements 27
6.8
JTAG Interface: I/O Boundary Scan Application
Timing Requirements ............................................... 30
6.9
JTAG Interface: I/O Boundary Scan Application
Switching Characteristics ......................................... 30
6.10
Programmable Output Clocks Switching
Characteristics ......................................................... 31
6.11
Port 1 and 2 Input Pixel Interface Timing
Requirements........................................................... 32
6.12
Two Pixels Per Clock (48-Bit Bus) Timing
Requirements........................................................... 33
6.13
SSP Switching Characteristics.............................. 33
6.14
DMD Interface Switching Characteristics ............. 35
6.15
DMD LVDS Interface Switching Characteristics ... 36
6.16
Source Input Blanking Requirements ................... 37
7
Detailed Description ............................................ 38
7.1
Overview ................................................................. 38
7.2
Functional Block Diagram ....................................... 38
7.3
Feature Description................................................. 39
7.4
Device Functional Modes........................................ 48
8
Application and Implementation ........................ 51
8.1
Application Information............................................ 51
8.2
Typical Applications ................................................ 51
9
Power Supply Recommendations ...................... 59
9.1
System Power Regulation ...................................... 59
9.2
System Environment and Defaults.......................... 60
9.3
System Power-Up Sequence .................................. 60
9.4
System Reset Operation ......................................... 62
10
Layout................................................................... 63
10.1
Layout Guidelines ................................................. 63
10.2
Layout Example .................................................... 74
10.3
Thermal Considerations ........................................ 76
11
Device and Documentation Support ................. 77
11.1
Device Support...................................................... 77
11.2
Documentation Support ........................................ 78
11.3
Community Resources.......................................... 78
11.4
Trademarks ........................................................... 79
11.5
Electrostatic Discharge Caution ............................ 79
11.6
Glossary ................................................................ 79
12
Mechanical, Packaging, and Orderable
Information ........................................................... 79
4 Revision History
Changes from Revision C (October 2016) to Revision D
Page
Changed "Pre-loaded" to "using Pre-stored Pattern Mode" ................................................................................................... 1
Added 8-Bit Grayscale Patterns using Video Pattern Mode to External Input Up to 360 Hz................................................. 1
Deleted Stores up to 400 1-Bit Binary or 50 8-Bit Grayscale Patterns from 128 Mbit Internal DRAM .................................. 1
Changed "MB" to "Mbit" for DRAM and External Flash throughout the document ................................................................ 1
Changed Quality Control to Automatic Optical Inspection in Applications ............................................................................. 1
Added Additive Manufacturing ............................................................................................................................................... 1
Added Heads Up Display in Applications ............................................................................................................................... 1
Updated RθJC description from 'Junction-to-air thermal resistance' to 'Junction-to-case thermal resistance' ...................... 23
Changed Firmware compatibility information to version 4 for all DMDs............................................................................... 27
Deleted Power-Down Method "A" to have one Method........................................................................................................ 28
Changed the DMD Full-Bus Connections reference link from the DLPC900 Programmer's Guide to the DLP
LightCrafter 6500 & 9000 EVM User's Guide....................................................................................................................... 40
Added note clarifying number of patterns storable in External Flash memory. ................................................................... 48
Deleted Manufacturer information columns from Device Nomenclature ............................................................................. 77
Changed Device Markings Lines 3 - 5 to TI proprietary information .................................................................................... 77




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