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DLPC900_V01 датащит (Datasheet) 49 Page - Texas Instruments

№ деталь DLPC900_V01
подробность  DLPC900 Digital Controller for Advanced Light Control
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
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DLPC900
www.ti.com
DLPS037D – OCTOBER 2014 – REVISED MARCH 2019
Product Folder Links: DLPC900
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Copyright © 2014–2019, Texas Instruments Incorporated
7.4 Device Functional Modes
7.4.1 Structured Light Application
For structured light applications, the DLPC900 can be commanded to enter the following high speed sequential
pattern modes.
1. Video Pattern Mode
2. Pre-Stored Pattern Mode
3. Pattern On-The-Fly Mode
In each mode a specific set of patterns are selected with a maximum of 24 bits per pixel. The bit-depth of the
patterns are then allocated into the corresponding time slots. Furthermore, an output trigger signal is also
synchronized with these time slots to indicate when the image is displayed.
These pattern modes provide the capability to display a set of patterns and signal a camera to capture these
patterns overlaid on an object. The DLPC900 controller is capable of pre-loading up to 400 1-bit binary patterns
into internal memory from the external flash memory or from the USB or I2C interfaces. These pre-loaded binary
patterns are then streamed to the DMD at high speed.
NOTE: The DLPC900 internal DRAM is capable of holding 400 1-bit images. However, when using Pre-
Stored Pattern Mode the number of patterns that can be stored in External Flash depends significantly
on the level of compression achievable.
The DLPC900 controller is capable of synchronizing a camera to the displayed patterns. In video pattern mode,
the vertical sync is used as trigger input. In pre-stored pattern mode and pattern on-the-fly mode, an internal user
configurable trigger or a TRIG_IN_1 pulse indicates to the DLPC900 controller to advance to the next pattern,
while TRIG_IN_2 starts and stops the pattern sequence. In all pattern modes, TRIG_OUT_1 frames the
exposure time of the pattern, while TRIG_OUT_2 indicates the start of the pattern sequence.
Figure 28 shows an example timing diagram of video pattern mode. The VSYNC starts the pattern sequence
display. The pattern sequence consists of a series of four patterns followed by a series of three patterns and then
repeats. The first pattern sequence consists of P1, P2, P3, and P4. The second pattern sequence consists of P5,
P6, and P7. TRIG_OUT_1 frames each pattern exposed, while TRIG_OUT_2 indicates the start of each pattern
in the sequence. If the pattern sequence is configured without dark time between patterns, then the
TRIG_OUT_1 output would be high for the entire pattern sequence.
Figure 28. Video Pattern Mode Timing Diagram
Figure 29 shows an example of a pre-stored pattern mode timing diagram. Pattern sequences of four are
displayed. TRIG_OUT_1 frames each pattern exposed, while TRIG_OUT_2 indicates the start of each pattern in
the sequence. If the pattern sequence is configured without dark time between patterns, then the TRIG_OUT_1
output would be high for the entire pattern sequence.
Figure 29. Pre-Stored Pattern Mode Timing Diagram




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