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ADC088S022CIMT датащи(PDF) 5 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
номер детали ADC088S022CIMT
подробное описание детали  8-Channel, 50 kSPS to 200 kSPS, 8-Bit A/D Converter
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

ADC088S022CIMT датащи(HTML) 5 Page - National Semiconductor (TI)

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ADC088S022 Timing Specifications
The following specifications apply for V
A =VD = +2.7V to 5.25V, AGND = DGND = 0V, fSCLK = 0.8 MHz to 3.2 MHz, fSAMPLE =
50 kSPS to 200 kSPS, and C
L = 50pF. Boldface limits apply for TA =TMIN to TMAX: all other limits TA = 25˚C.
Symbol
Parameter
Conditions
Typical
Limits
(Note 7)
Units
t
CSH
CS Hold Time after SCLK Rising
Edge
(Note 9)
0
10
ns (min)
t
CSS
CS Setup Time prior to SCLK Rising
Edge
(Note 9)
5
10
ns (min)
t
EN
CS Falling Edge to DOUT enabled
5
30
ns (max)
t
DACC
DOUT Access Time after SCLK
Falling Edge
17
27
ns (max)
t
DHLD
DOUT Hold Time after SCLK Falling
Edge
4
ns (typ)
t
DS
DIN Setup Time prior to SCLK
Rising Edge
3
10
ns (min)
t
DH
DIN Hold Time after SCLK Rising
Edge
3
10
ns (min)
t
CH
SCLK High Time
0.4 x
t
SCLK
ns (min)
t
CL
SCLK Low Time
0.4 x
t
SCLK
ns (min)
t
DIS
CS Rising Edge to DOUT
High-Impedance
DOUT falling
2.4
20
ns (max)
DOUT rising
0.9
20
ns (max)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND = 0V, unless otherwise specified.
Note 3: When the input voltage at any pin exceeds the power supplies (that is, VIN < AGND or VIN > VA or VD), the current at that pin should be limited to 10 mA.
The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to two.
Note 4: The absolute maximum junction temperature (TJmax) for this device is 150˚C. The maximum allowable power dissipation is dictated by TJmax, the
junction-to-ambient thermal resistance (
θJA), and the ambient temperature (TA), and can be calculated using the formula PDMAX=(TJmax − TA)/θJA. In the 16-pin
TSSOP,
θJA is 96˚C/W, so PDMAX = 1,200 mW at 25˚C and 625 mW at the maximum operating ambient temperature of 105˚C. Note that the power consumption
of this device under normal operation is a maximum of 12 mW. The values for maximum power dissipation listed above will be reached only when the ADC088S022
is operated in a severe fault condition (e.g. when input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed).
Obviously, such conditions should always be avoided.
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 k
Ω resistor. Machine model is 220 pF discharged through ZERO ohms
Note 6: Reflow temperature profiles are different for lead-free packages.
Note 7: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: Data sheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 9: Clock may be in any state (high or low) when CS goes high. Setup and hold restrictions apply only to CS going low.
www.national.com
5


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