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GS881E18BT-150IV датащи(PDF) 11 Page - GSI Technology |
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GS881E18BT-150IV датащи(HTML) 11 Page - GSI Technology |
11 / 36 page Mode Pin Functions Mode Name Pin Name State Function Burst Order Control LBO L Linear Burst H Interleaved Burst Output Register Control FT L Flow Through H or NC Pipeline Power Down Control ZZ L or NC Active H Standby, IDD = ISB GS881E18/32/36B(T/D)-xxxV Rev: 1.00 6/2006 11/36 © 2006, GSI Technology Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Note: There is a pull-up device on the FT pin and a pull-down device on the ZZ pin, so this input pin can be unconnected and the chip will operate in the default states as specified in the above table. Note: The burst counter wraps to initial state on the 5th clock. Note: The burst counter wraps to initial state on the 5th clock. Linear Burst Sequence A[1:0] A[1:0] A[1:0] A[1:0] 1st address 00 01 10 11 2nd address 01 10 11 00 3rd address 10 11 00 01 4th address 11 00 01 10 Interleaved Burst Sequence A[1:0] A[1:0] A[1:0] A[1:0] 1st address 00 01 10 11 2nd address 01 00 11 10 3rd address 10 11 00 01 4th address 11 10 01 00 Burst Counter Sequences BPR 1999.05.18 |
Аналогичный номер детали - GS881E18BT-150IV |
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Аналогичное описание - GS881E18BT-150IV |
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