поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

GS8662S08E-167 датащи(PDF) 9 Page - GSI Technology

номер детали GS8662S08E-167
подробное описание детали  72Mb Burst of 2 DDR SigmaSIO-II SRAM
Download  37 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  GSI [GSI Technology]
домашняя страница  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS8662S08E-167 датащи(HTML) 9 Page - GSI Technology

Back Button GS8662S08E-167 Datasheet HTML 5Page - GSI Technology GS8662S08E-167 Datasheet HTML 6Page - GSI Technology GS8662S08E-167 Datasheet HTML 7Page - GSI Technology GS8662S08E-167 Datasheet HTML 8Page - GSI Technology GS8662S08E-167 Datasheet HTML 9Page - GSI Technology GS8662S08E-167 Datasheet HTML 10Page - GSI Technology GS8662S08E-167 Datasheet HTML 11Page - GSI Technology GS8662S08E-167 Datasheet HTML 12Page - GSI Technology GS8662S08E-167 Datasheet HTML 13Page - GSI Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 37 page
background image
Preliminary
GS8662S08/09/18/36E-333/300/250/200/167
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01 9/2005
9/37
© 2005, GSI Technology
Special Functions
Byte Write and Nybble Write Control
Byte Write Enable pins are sampled at the same time that Data In is sampled. A high on the Byte Write Enable pin associated with
a particular byte (e.g., BW0 controls D0–D8 inputs) will inhibit the storage of that particular byte, leaving whatever data may be
stored at the current address at that byte location undisturbed. Any or all of the Byte Write Enable pins may be driven high or low
during the data in sample times in a write sequence.
Each write enable command and write address loaded into the RAM provides the base address for a 2 beat data transfer. The x18
version of the RAM, for example, may write 36 bits in association with each address loaded. Any 9-bit byte may be masked in any
write sequence.
Nybble Write (4-bit) control is implemented on the 8-bit-wide version of the device. For the x8 version of the device, “Nybble
Write Enable” and “NWx” may be substituted in all the discussion above.
Example x18 RAM Write Sequence using Byte Write Enables
Data In Sample
Time
BW0
BW1
D0–D8
D9–D17
Beat 1
0
1
Data In
Don’t Care
Beat 2
1
0
Don’t Care
Data In
Resulting Write Operation
Beat 1
Beat 2
D0–D8
D9–D17
D0–D8
D9–D17
Written
Unchanged
Unchanged
Written
Output Register Control
SigmaSIO-II SRAMs offer two mechanisms for controlling the output data registers. Typically, control is handled by the Output
Register Clock inputs, C and C. The Output Register Clock inputs can be used to make small phase adjustments in the firing of the
output registers by allowing the user to delay driving data out as much as a few nanoseconds beyond the next rising edges of the K
and K clocks. If the C and C clock inputs are tied high, the RAM reverts to K and K control of the outputs.


Аналогичный номер детали - GS8662S08E-167

производительномер деталидатащиподробное описание детали
logo
GSI Technology
GS8662S08 GSI-GS8662S08 Datasheet
1Mb / 35P
   72Mb SigmaSIOTM DDR -II Burst of 2 SRAM
More results

Аналогичное описание - GS8662S08E-167

производительномер деталидатащиподробное описание детали
logo
GSI Technology
GS8342S08E GSI-GS8342S08E Datasheet
1Mb / 39P
   36Mb Burst of 2 DDR SigmaSIO-II SRAM
GS8182S18D GSI-GS8182S18D Datasheet
1Mb / 31P
   18Mb Burst of 2 DDR SigmaSIO-II SRAM
GS8662T08E GSI-GS8662T08E Datasheet
1Mb / 37P
   72Mb SigmaCIO DDR-II Burst of 2 SRAM
GS8662S08 GSI-GS8662S08 Datasheet
1Mb / 35P
   72Mb SigmaSIOTM DDR -II Burst of 2 SRAM
GS8182S08 GSI-GS8182S08 Datasheet
764Kb / 36P
   18Mb Burst of 2 SigmaSIO DDR-IITM SRAM
GS8342S08 GSI-GS8342S08 Datasheet
502Kb / 35P
   36Mb SigmaSIO DDR-IITM Burst of 2 SRAM
GS8662R08E GSI-GS8662R08E Datasheet
1Mb / 37P
   72Mb SigmaCIO DDR-II Burst of 4 SRAM
GS8662TT20 GSI-GS8662TT20 Datasheet
443Kb / 31P
   72Mb SigmaDDRTM-II Burst of 2 SRAM
GS8662Q08E GSI-GS8662Q08E Datasheet
1Mb / 35P
   72Mb SigmaQuad-II Burst of 2 SRAM
GS8662Q37BD-333 GSI-GS8662Q37BD-333 Datasheet
502Kb / 28P
   72Mb SigmaQuad-IITM Burst of 2 SRAM
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37


датащи скачать

Go To PDF Page


ссылки URL




Конфиденциальность
ALLDATASHEETRU.COM
Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com