Philips Semiconductors

Product specification

74F723A/74F723–1/

74F725A/74F725–1

Multiplexers

74F723A

Quad 3-to-1 Data Selector Multiplexer (3-State)

74F723-1 Quad 3-to-1 Data Selector Multiplexer with 30

W Equivalent Output Termination Impedance (3-State)

74F725A

Quad 4-to-1 Data Selector Multiplexer

74F725-1 Quad 4-to-1 Data Selector Multiplexer with 30

W Equivalent Output Termination Impedance

2

1990 Dec 13

853-1369 01257

FEATURES for 74F723A/74F723-1

(20

µA in High and Low states)

input

applications

(improves speed and noise immunity)

FEATURES for 74F725A/74F725-1

(20

µA in High and Low states)

DESCRIPTION

The 74F723A/74F723-1 consist of four 3-to-1 multiplexers designed

for address multiplexing of dynamic RAMs and other multiplexing

applications. Select (S0, S1) inputs control which line is to be

selected, as defined in the Function Table for 74F723A/74F723-1.

When the invering input (INV) is Low, the input data path is inverted.

used. The 3-State outputs source 15mA and sink 64mA. The

74F723-1 is the same as 74F723A except that it has a 30

W

temination impedance on each output to reduce line noise and the

3-State outputs sink 5mA.

The 74F725A/74F725-1 consist of four 4-to1 multiplexers designed

for general multiplexing purpose. The select (S0, S1) inputs control

which line is to be selected, as defined in the Function Table for

74F725A/725-1. The outputs source 15mA and sink 64mA. The

74F725-1 is the same as the 74F725A except that it has a 30

W

termination impedance on each output to reduce line noise and the

outputs sink 5mA.

TYPE

TYPICAL

PROPAGATION DELAY

TYPICAL SUPPLY

CURRENT

(TOTAL)

74F723A

5.5ns

25mA

74F723-1

7.0ns

26mA

74F725A

5.5ns

20mA

74F725-1

6.5ns

20mA

ORDERING INFORMATION

DESCRIPTION

COMMERCIAL RANGE

PKG DWG

#

20-Pin Plastic Slim

N74F723AN, N74F723-1N,

SOT222 1

DIP (300 mil)

,,

N74F725AN, N74F725-1N

SOT222-1

24 Pin Plastic SOL

N74F723AD, N74F723-1D,

SOT137 1

24-Pin Plastic SOL

,,

N74F725AD, N74F725-1D

SOT137-1

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

TYPE

PINS

DESCRIPTION

74F(U.L.)

HIGH/LOW

LOAD VALUE

HIGH/LOW

Dna, Dnb, Dnc

Data inputs

1.0/0.066

20

µA/40µA

74F723A/

S0, S1

Select inputs

1.0/0.033

20

µA/20µA

74F723-1

OE

Output Enable input

1.0/0.033

20

µA/20µA

INV

Output inverting input

1.0/0.033

20

µA/20µA

74F723A

Q0 - Q3

Data outputs for 74F723A

750/106.7

15mA/64mA

74F723-1

Q0 - Q3

Data outputs for 74F723-1

750/8.33

15mA/5mA

74F725A/

Dna, Dnb, Dnc, Dnd

Data inputs

1.0/0.066

20

µA/40µA

74F725-1

S0, S1

Select inputs

1.0/0.033

20

µA/20µA

74F725A

Q0 - Q3

Data outputs

750/106.7

15mA/64mA

74F725-1

Q0 - Q3

Data outputs

750/8.33

15mA/5mA

NOTE: One (1.0) FAST Unit Load (U.L.) is defined as: 20

µA in the High state and 0.6mA in the Low state.