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UC1867DWTR датащи(PDF) 4 Page - Texas Instruments

номер детали UC1867DWTR
подробное описание детали  Resonant-Mode Power Supply Controllers
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домашняя страница  http://www.ti.com
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UC1867DWTR датащи(HTML) 4 Page - Texas Instruments

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UC1861-1868
UC2861-2868
UC3861-3868
ELECTRICAL CHARACTERISTICS Unless otherwise stated, all specifications apply for –55
°C≤TA≤125°C for the
UC186x, –25
°C≤TA≤85°C for the UC286x, and 0°C≤TA≤70°C for the UC386x, VCC=12V, CVCO=1nF, Range=7.15k, RMIN=86.6k,
C=200pF, R=4.02k, and Csr=0.1
µF. TA=TJ.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
UVLO
Vcc Turn-on Threshold
UCx861, UCx862, UCx865, UCx866
15
16.5
18
V
UCx863, UCx864, UCx867, UCx868
7
8.0
9
V
Vcc Turn-off Threshold
UCx861, UCx862, UCx865, UCx866
9.5
10.5
11.5
V
UCx863, UCx864, UCx867, UCx868
6
7.0
8
V
Icc Start
VCC =VCC(on) – 0.3V
150
300
µA
Icc Run
VID = 100mV
25
32
mA
Note 1: Currents are defined as positive into the pin.
Note 2: Pulse measurement techniques are used to insure that TJ = TA.
Note 3: VID = V(NI) – V(INV).
Note 4: This parameter is not 100% tested in production but guaranteed by design.
Note 5: Vi = 0 to 4V
tr(Vi)
10ns
tpd = t(Vo = 6V) – t(Vi = 3V)
UVLO & 5V GENERATOR (See Figure 1): When power
is applied to the chip and Vcc is less than the upper
UVLO threshold, Icc will be less than 300
µA, the 5V gen-
erator will be off, and the outputs will be actively held low.
When Vcc exceeds the upper UVLO threshold, the 5V
generator turns on. Until the 5V pin exceeds 4.9V, the
outputs will still remain low.
The 5V pin should be bypassed to signal ground with a
0.1
µF capacitor. The capacitor should have low equiva-
lent series resistance and inductance.
FAULT AND SOFT-REFERENCE (See Figure 1): The
Soft-Ref pin serves three functions: system reference, re-
start delay, and soft-start. Designed to source or sink
200
µA, this pin should be used as the input reference for
the error amplifier circuit. This pin requires a bypass ca-
pacitor of at least 0.1
µF. This yields a minimum soft-start
time of 1ms.
Under-Voltage Lockout sets both the fault and restart de-
lay latches.
This holds the outputs low and discharges
the Soft-Ref pin. After UVLO, the fault latch is reset by the
low voltage on the Soft-Ref pin. The reset fault latch re-
sets the delay latch and Soft-Ref charges via the 0.5mA
current source.
The fault pin is input to a high speed comparator with a
threshold of 3V. In the event of a detected fault, the fault
latch is set and the outputs are driven low. If Soft-Ref is
above 4V, the delay latch is set. Restart delay is timed as
Soft-Ref is discharged by 20
µA. When Soft-Ref is fully
discharged, the fault latch is reset if the fault input signal
is low. The Fault pin can be used as a system shutdown
pin.
If a fault is detected during soft-start, the fault latch is set
and the outputs are driven low. The delay latch will re-
main reset until Soft-Ref charges to 4V. This sets the de-
lay latch, and restart delay is timed. Note that restart
delay for a single fault event is longer than for recurring
faults since Soft-Ref must be discharged from 5V instead
of 4V.
The restart delay to soft-start time ratio is 24:1 for a fault
occurring during normal operation and 19:1 for faults oc-
curring during soft-start. Shorter ratios can be pro-
grammed down to a limit of approximately 3:1 by the
addition of a 20k
Ω or larger resistor from Soft-Ref to
ground.
A 100k
Ω resistor from Soft-Ref to 5V will have the effect
of permanent shut down after a fault since the internal
20
µA current source can't pull Soft-Ref low. This feature
can be used to require recycling Vcc after a fault. Care
must be taken to insure Soft-Ref is indeed low at start up,
or the fault latch will never be reset.
APPLICATION INFORMATION


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