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74LVC377PWDH датащи(PDF) 2 Page - NXP Semiconductors

номер детали 74LVC377PWDH
подробное описание детали  Octal D-type flip-flop with data enable; positive-edge trigger
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производитель  PHILIPS [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LVC377PWDH датащи(HTML) 2 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74LVC377
Octal D-type flip-flop with data enable;
positive-edge trigger
2
1998 Jul 29
FEATURES
Wide supply voltage range of 1.2V to 3.6V
Conforms to JEDEC standard 8-1A
Inputs accept voltages up to 5.5V
CMOS low power consumption
Direct interface with TTL levels
Output drive capability 50Ω transmission lines @ 85°C
DESCRIPTION
The 74LVC377 is a low-voltage Si-gate CMOS device, superior to
most advanced CMOS compatible TTL families.
The 74LVC377 has eight edge-triggered , D-type flip-flops with
individual D inputs and Q outputs. A common clock (CP) input loads
all flip-flops simultaneously when the data enable E is LOW. The
state of each D input, one set-up time before the LOW-to-HIGH
clock transition, is transferred to the corresponding output (Qn) of
the flip-flop. The E input must be stable only one set-up time prior to
the LOW-to-HIGH transition for predictable operation.
QUICK REFERENCE DATA
GND = 0V; Tamb = 25°C; tr =tf v2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
tPHL/tPLH
Propagation delay
CP to Qn;
CL = 50pF
VCC = 3.3V
6.0
ns
f
Maximum clock frequency
230
MHz
fmax
Maximum clock frequency
230
MHz
CI
Input capacitance
5.0
pF
CPD
Power dissipation
capacitance per flip-flop
VI = GND to VCC1
22
pF
NOTES:
1CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD
VCC2 x fi )S (CL
VCC2
fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
S (CL
VCC2
fo) = sum of the outputs.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
20-Pin Plastic SO
–40
°C to +85°C
74LVC377 D
74LVC377 D
SOT163-1
20-Pin Plastic SSOP Type II
–40
°C to +85°C
74LVC377 DB
74LVC377 DB
SOT339-1
20-Pin Plastic TSSOP Type I
–40
°C to +85°C
74LVC377 PW
74LVC377PW DH
SOT360-1
PIN CONFIGURATION
14
13
12
11
10
9
8
7
6
5
4
3
2
1
GND
VCC
15
16
17
18
19
20
E
Q0
D0
D1
Q1
Q2
D2
D3
Q3
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
SY00058
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1
E
Data enable input (active LOW)
2, 5, 6,
9, 12, 15,
16, 19
Q0 – Q7
Flip-flop outputs
3, 4, 7,
8, 13, 14,
17, 18
D0 – D7
Data inputs
10
GND
Ground (0V)
11
CP
Clock input (LOW-to-HIGH,
edge-triggered)
20
VCC
Positive power supply


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