Philips Semiconductors

Product specification

74LVT534

3.3V Octal D-type flip-flop, inverting (3-State)

1998 Feb 19

3

LOGIC SYMBOL (IEEE/IEC)

1

3

2

4

5

7

6

8

9

EN

11

C1

13

12

14

15

17

16

18

19

1D

SA00163

PIN DESCRIPTION

PIN NUMBER

SYMBOL

FUNCTION

1

OE

Output enable input (active-Low)

3, 4, 7, 8,

13, 14, 17, 18

D0-D7

Data inputs

2, 5, 6, 9,

12, 15, 16, 19

Q0-Q7

Inverting 3-State outputs

11

CP

Clock pulse input (active rising

edge)

10

GND

Ground (0V)

20

Positive supply voltage

FUNCTION TABLE

INPUTS

INTERNAL

OUTPUTS

OPERATING

MODE

OE

CP

Dn

REGISTER

Q0 – Q7

L

L

↑

↑

l

h

L

H

H

L

Latch and read

register

L

↑

X

NC

NC

Hold

H

H

↑

↑

X

Dn

NC

Dn

Z

Z

Disable

outputs

H = High voltage level

h

= High voltage level one set-up time prior to the Low-to-High

clock transition

L

= Low voltage level

l

= Low voltage level one set-up time prior to the Low-to-High

clock transition

NC= No change

X = Don’t care

Z = High impedance “off” state

↑ = Low-to-High clock transition

↑ = not a Low-to-High clock transition

LOGIC DIAGRAM

19

CP Q

D

2

D0

Q0

CP Q

D

3

D1

CP Q

D

4

D2

CP Q

D

5

D3

CP Q

D

6

D4

CP Q

D

7

D5

CP Q

D

8

D6

CP Q

D

9

D7

Q1

18

Q2

17

Q3

16

Q4

15

Q5

14

Q6

13

Q7

12

11

CP

1

OE

SV00168