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LM3880MF-1AB датащи(PDF) 9 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали LM3880MF-1AB
подробное описание детали  Power Sequencer
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM3880MF-1AB датащи(HTML) 9 Page - National Semiconductor (TI)

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Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation
of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions,
see the Electrical Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T
J = 150°C (typ.) and disengages at TJ
= 130°C (typ.).
Note 4: For detailed soldering specifications and information, please refer to National Semiconductor Application Note 1112: Micro SMD Wafer Level Chip Scale
Package (AN-1112)
Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (T
A-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125°C), the maximum power
dissipation of the device in the application (P
D-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the
following equation: T
A-MAX = TJ-MAX-OP – (θJA × PD-MAX).
Note 6: Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists,
special attention must be paid to thermal dissipation issues in board design.
Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical (typ.) numbers are not guaranteed, but do represent the most likely
norm. Unless otherwise specified, conditions for typ. specifications are: V
BATT = 3.6V and TA = 25°C.
Note 8: Dropout voltage is defined as the input to output voltage differential at which the output voltage falls to 100 mV below the nominal output voltage.
Note 9: The parameters in the electrical characteristic table are tested at V
BATT = 3.6V unless otherwise specified. For performance over the input voltage range
refer to datasheet curves.
Note 10: The input voltage range recommended for ideal applications performance for the specified output voltages is given below:
V
BATT = 2.7V to 5.5V for 1.0V VOUT_DCDC < 1.8V
V
BATT = (VOUT_DCDC + 1V) to 5.5V for 1.8V VOUT_DCDC < 3.6V
Note 11: Electrical Characteristic table reflects open loop data (FB = 0V and current drawn from SW pin ramped up until cycle by cycle current limit is activated).
Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current until output voltage drops by 10%.
Note 12: The noise performance target is applied to PWM mode operation and this does not apply when DCDC converter is operating in PFM mode.
Note 13: Parameters guaranteed by design.
Note 14: To calculate the output voltage from the line regulation specified, use the following equation:
ΔV
OUT = Line Regulation (%/V) x Nominal VOUT (V) x
ΔV
IN (V).
Note 15: To calculate the output voltage from the load regulation specified, use the following equation:
ΔV
OUT = Load Regulation (%/mA) x Nominal VOUT (V) x
ΔI
OUT (mA).
Note 16: For line and load transient specifications, the + symbol represents an overshoot in the output voltage and the – symbol represents an undershoot in the
output voltage. The first value signifies overshoot or undershoot at the rising edge and the second value signifies the overshoot or undershoot at the falling edge.
Note 17: VIN_LDO must be ON at all time for biasing internal reference circuits
9
www.national.com


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