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CS5503-BP датащи(PDF) 8 Page - Cirrus Logic

номер детали CS5503-BP
подробное описание детали  Low-Cost, 16 & 20-Bit Measurement A/D Converter
Download  54 Pages
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производитель  CIRRUS [Cirrus Logic]
домашняя страница  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS5503-BP датащи(HTML) 8 Page - Cirrus Logic

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SWITCHING CHARACTERISTICS (continued) (TA = Tmin to Tmax; VA+, VD+ = 5V ± 10%;
VA-, VD- = -5V
± 10%; Input Levels: Logic 0 = 0V, Logic 1 = VD+; CL = 50 pF)
Parameter
Symbol
Min
Typ
Max
Units
SSC Mode (Mode = VD+)
Access Time
CS Low to SDATA Out
tcsd1
3/CLKIN
-
-
ns
SDATA Delay Time
SCLK Falling to New SDATA bit
tdd1
-
25
100
ns
SCLK Delay Time
SDATA MSB bit to SCLK Rising
(at 4.096 MHz)
tcd1
250
380
-
ns
Serial Clock
Pulse Width High (at 4.096 MHz)
(Out)
Pulse Width Low
tph1
tpl1
-
-
240
730
300
790
ns
Output Float Delay
SCLK Rising to Hi-Z
tfd2
-
1/CLKIN
+ 100
1/CLKIN
+ 200
ns
Output Float Delay
CS High to Output Hi-Z (Note 18)
tfd1
--
4/CLKIN
+200
ns
SEC Mode (Mode = DGND)
Serial Clock (In)
fsclk
dc
-
4.2
MHz
Serial Clock (In)
Pulse Width High
Pulse Width Low
tph2
tpl2
50
180
-
-
-
-
ns
Access Time
CS Low to Data Valid
(Note 19)
tcsd2
-
80
160
ns
Maximum Data Delay Time
(Note 20)
SCLK Falling to New SDATA bit
tdd2
-
75
150
ns
Output Float Delay
CS High to Output Hi-Z
tfd3
-
-
250
ns
Output Float Delay
SCLK Falling to Output Hi-Z
tfd4
-
100
200
ns
Notes: 18. If CS is returned high before all data bits are output, the SDATA and SCLK outputs will complete
the current data bit and then go to high impedance.
19. If CS is activated asynchronously to DRDY, CS will not be recognized if it occurs when DRDY is high
for 4 clock cycles. The propagation delay time may be as great as 4 CLKIN cycles plus 160 ns.
To guarantee proper clocking of SDATA when using asychronous CS, SCLK(i) should not be taken
high sooner than 4 CLKIN cycles plus 160ns after CS goes low.
20. SDATA transitions on the falling edge of SCLK(i).
SDATA
CS
fd1
t
Output Float Delay
SSC Mode (Note 19)
sls
t
CLKIN
SLEEP
Sleep Mode Timing for
Synchronization
VALID
CAL
SC1, SC2
scs
t
sch
t
Calibration Control Timing
CS5501/CS5503
8
DS31F2


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