Philips Semiconductors

Product specification

N-channel enhancement mode

BSP100

TrenchMOS

™ transistor

Fig.11. Sub-threshold drain current.

I

Fig.12. Typical capacitances, C

C = f(V

Fig.13. Typical turn-on gate-charge characteristics.

V

Fig.14. Typical reverse diode current.

I

Fig.15. Maximum permissible non-repetitive

avalanche current (I

unclamped inductive load

012345

1E-06

1E-05

1E-04

1E-03

1E-02

1E-01

Sub-Threshold Conduction

typ

min

max

0

1

2

3

4

5

6

7

8

9

10

0

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

1

1.1 1.2 1.3 1.4 1.5

Drain-Source Voltage, VSDS (V)

Source-Drain Diode Current, IF (A)

Tj = 25 C

150 C

VGS = 0 V

10

100

1000

0.1

1

10

100

Drain-Source Voltage, VDS (V)

Capacitances, Ciss, Coss, Crss (pF)

Ciss

Coss

Crss

BSP100

0.1

1

10

1E-06

1E-05

1E-04

1E-03

1E-02

Avalanche time, tp (s)

Non-repetitive Avalanche current, IAS (A)

25 C

VDS

ID

tp

Tj prior to avalanche =125 C

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

012

34567

89

10

Gate charge, QG (nC)

Gate-source voltage, VGS (V)

ID = 2.3A

Tj = 25 C

VDD = 15 V

February 1999

5

Rev 1.000