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SL1461MPAS датащи(PDF) 6 Page - List of Unclassifed Manufacturers

номер детали SL1461MPAS
подробное описание детали  WIDEBAND PLL FM DEMODULATOR
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производитель  ETC2 [List of Unclassifed Manufacturers]
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SL1461
6
AFC FACILITY
The SL1461 contains an analog frequency error detect
circuit, which generates DC voltage proportional to the
integral of frequency error. If the incident RF is high then the
AFC voltage increases, if low then the voltage decreases. The
AFC voltage can then be converted by an ADC to be read by
the micro controller for frequency fine tuning; if used in an I2C
system it is recommended the device is used with either the
SP5055 or SP5056 frequency synthesiser which contains an
internal ADC readable via the I2C bus.
The voltage corresponding to frequency alignment is
arbitrary and user defined; if used with the SP5055 it is
suggested the aligned voltage is 0.375 VCC, corresponding to
the centre code of the ADC on port 6.
The AFC detect circuit contains a deadband centred
around the aligned frequency. The deadband can be adjusted
from zero window to approximately 25MHz width assuming an
oscillator dF/dV of 15MHz/V. If the incident RF is within this
window the AFC voltage does not integrate, except by
component leakage.
With reference to Fig.5; in normal operation the
demodulated video is fed to a dual comparator where it is
compared with two reference voltages, corresponding to the
extremes of the deadband, or window. These voltages are
variable and set by the window adjust input.
The
comparators
produce
two
digital
outputs
corresponding to voltages above or below the voltage window,
or frequency above or below deadband. These digital control
signals are used to control a complimentary current source
pump. The current signals are then fed to the input of an
amplifier which is arranged as an integrator, so integrating the
pulses into a DC voltage.
If the frequency is correctly aligned both the current source
and sink are disabled, therefore the DC output voltage
remains constant. There will be a small drift due to component
leakage; the maximum drift can be calculated from;
dV
dt +
I
2500.C where I +
VCC
REXT
, C + CEXT
WINDOW
ADJUST
HI
V
LO
V
VALIGN
FREQ
BASEBAND
VIDEO
VCC
VCC
VEE
CEXT
EXT
R
VAFC
Fig. 5 AFC system block diagram
+
+


Аналогичный номер детали - SL1461MPAS

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Аналогичное описание - SL1461MPAS

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