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CA3224E датащи(PDF) 1 Page - Intersil Corporation

номер детали CA3224E
подробное описание детали  Automatic Picture Tube Bias Control Circuit
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производитель  INTERSIL [Intersil Corporation]
домашняя страница  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

CA3224E датащи(HTML) 1 Page - Intersil Corporation

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1
®
FN1553.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
CA3224E
Automatic Picture Tube Bias Control
Circuit
Description
The CA3224E is an automatic picture tube bias control cir-
cuit used in color TV receiver CRT drive circuits. It is used to
provide dynamic bias control of the grey scale both initially
and over the CRT operating life, compensating for CRT cut-
off changes.
The CA3224E provides automatic continuous control of the
cutoff current in each gun of a three-gun color CRT. From an
input pulse amplitude proportional to the difference between
the desired and the actual CRT cutoff, a gated sample/hold
circuit generates a DC correction voltage which correctly
biases the CRT driver circuit. The sample/hold bias
correction takes place each frame following the vertical
blanking. Figure 1 shows a block diagram of the CA3224E.
The functions include three identical servo loop
transconductance amplifiers with a sample/hold switch and
buffer amplifier plus control logic, internal bias and a mode.
Features
• Automatic Picture Tube Bias Cutoff Control
• Automatic Background Color Balance
• Eliminates Grey Scale Adjustments
• Compensates for Cathode-to-Heater Leakage
• Electrostatic Protection on All Pins
• Servo Loop Design
• Wide Dynamic Range
• Three-Gun Control
• Minimal External Components
Pinout
CA3224E
(PDIP)
TOP VIEW
Part Number Information
PART
NUMBER
TEMP. RANGE
(oC)
PACKAGE
PKG. NO.
CA3224E
-40 to 85
22 Ld PDIP
E22.4
1
11
10
9
8
7
6
5
3
2
4
22
12
13
14
15
16
17
18
19
21
20
CHANNEL 1 INPUT
CHANNEL 1 FREQ COMPENSATION
CHANNEL 2 INPUT
CHANNEL 2 FREQ COMPENSATION
CHANNEL 3 INPUT
CHANNEL 3 FREQ COMPENSATION
GROUND
VERTICAL INPUT
HORIZONTAL INPUT
GRID PULSE OUTPUT
CHANNEL 1 HOLD CAP
CHANNEL 2 HOLD CAP
CHANNEL 2 OUTPUT
CHANNEL 3 HOLD CAP
CHANNEL 1 OUTPUT
CHANNEL 3 OUTPUT
VREF BYPASS
AUTO BIAS LEVEL ADJUST
AUTO BIAS PULSE OUTPUT
PROGRAM PULSE OUTPUT
GROUND
VCC
Data Sheet
October 2002
OBSO
LETE
PRODU
CT
NO RE
COMM
ENDE
D REP
LACE
MENT


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