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CDP68HC68A2 датащи(PDF) 11 Page - Intersil Corporation |
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CDP68HC68A2 датащи(HTML) 11 Page - Intersil Corporation |
11 / 15 page 11 second a conversion is automatically started on the next channel selected in the CSR. This read-convert pattern can be continued indefinitely. When reading Data Registers in Mode 1, the user can be certain that the contents of the CAR equal the channel number which was just converted. Thus the Address/Control Byte sent prior to the read will automatically match the CAR. If a read from a Data Register, other than the one just converted, is performed, the CAR must be set to the desired register prior to sending the Address/Control Byte. Setting CAR is done by writing the SAR with ENC = 0, SAE = 1, and the CA2 - CA0 bits equal to the desired channel. Mode 2 - Single Scan In mode 2, when ENC is set in the SAR, conversions are performed on all channels selected in the CSR. Conversions begin on the channel specified by the CAR (this channel does not have to be active in the CSR) and proceed in ascending order until all channels selected in the CSR have been converted. If the starting channel is not the lowest active channel, when the highest active channel is done converting, the CAR advances to the lowest active channel and continues from that point until all channels have been converted once. When ENC is set i n the SAR, the internal clock is activated (if selected), the CIP flag is set in the SR, and conversions begin. The CIP flag doesn’t remain high, as it momentarily goes low between each channel conversion. When all channels have been converted the INT and ACC flags in the SR are set, the INT pin is driven low (if IE is true in the MSR), the CIP flag is cleared, and, if active, the internal oscillator is disabled. Data Registers can safely be read after all channels have been converted. If the starting channel was a channel active in the CSR then the CAR will one again be pointing to that channel (providing all channels had been read or CSR or MSR written since the last set of conversions - see Note below). IF a read from a Data Register, other than the one first converted, is performed, the CAR must be set to the desired register prior to sending the Address/Control Byte. Setting CAR is done by writing the SAR with ENC = 0, SAE = 1, and the CA2 - CA0 bits equal to the desired channel. NOTE: A write to the SAR does not clear the DV flag for each channel. This implies that if: conversions are completed on all registers selected in CSR; conversions stopped; an incomplete read of the Data Registers is performed; and conversions reinitiated with a write to the SAR - some DVs will still be set. In Mode 2, which terminates when all DVs are true (ACC goes true), unread channels may not be converted unless CSR is written to before setting ENC. There are two ways to prematurely stop conversions in Mode 2. The first is to perform any “abort” action (see Abort Modes). Performing an abort, may produce spurious conversion values. The second, and preferred means to stop a Mode 2 conversion, is to clear the ENC bit by writing a $00 to the SAR. Clearing ENC will synchronously stop conversions at the end of the current conversion. When prematurely stopping conversions, CIP is not valid. The CIP flag cannot be used to determine when the current conversion is complete. Instead, a time delay equal to one conversion time must be built into the software. The appropriate delay will ensure the last conversion is complete before Data Register reads begin. Prematurely stopping the conversions leaves the CAR in an unknown state. One remaining task, before Data Registers are read, is to be certain the contents of the CAR match the address sent in the Address/Control Byte. This is done by jamming the CAR with a write to the SAR with ENC = 0, SAE = 1, CA3 - C A2 - CA0 equal to the desired channel address. Mode 3 - Continuous Scan In Mode 3, when ENC is set in the SAR, conversions are performed on all channels selected in the CSR. COnversion begin on the channel specified by the CAR (this channel does not have to be active in the CSR) and proceed in ascending order for all channels selected in the CSR. Each time the highest active channel is done converting, the CAR advances to the lowest active channel and continues from that point. When ENC is set in the SAR, the internal clock is activated (if selected) and conversions begin. When all channels have been converted one time the ACC flag in the SR is set. This is the only valid status flag in Mode 3. The CIP flag is not valid in Mode 3. The INT flag and the INT pin are both held in a disabled state during Mode 3. Data Registers cannot be read until Mode 3 conversions have been terminated. There are two ways to stop conversions in Mode 3. The first is to perform any “abort” action (see Abort Modes). Performing an abort, may produce spurious conversion values. The second, and preferred means to stop a Mode 3 conversion, is to clear the ENC bit by writing a $00 to the SAR. Clearing ENC will synchronously stop conversions at the end of the current conversion. CIP is not valid following the clearing of ENC. The CIP flag cannot be used to determine when the current conversion is complete. Instead, a time delay equal to one conversion time must be built into the software. The appropriate delay will ensure the last conversion is complete before Data Register reads begin. The Data Registers can safely be read after ENC is cleared and one conversion time has elapsed. One remaining task is to be certain the contents of the CAR match the address sent in the Address/Control Byte. This is done by jamming the CAR with a write to the SAR with ENC = 0, SAE = 1, and CA2 - CA0 equal to the desired channel address. Abort Modes Any active mode can be aborted by any one of the following means: CDP68HC68A2 |
Аналогичный номер детали - CDP68HC68A2 |
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Аналогичное описание - CDP68HC68A2 |
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