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AM29DL800BB120WBC датащи(PDF) 5 Page - Advanced Micro Devices |
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AM29DL800BB120WBC датащи(HTML) 5 Page - Advanced Micro Devices |
5 / 46 page December 4, 2006 21519C4 Am29DL800B 3 D A TA SH EE T TABLE OF CONTENTS Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5 Special Handling Instructions for FBGA Package .................... 6 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8 Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 9 Table 1. Am29DL800B Device Bus Operations ................................9 Word/Byte Configuration .......................................................... 9 Requirements for Reading Array Data ..................................... 9 Writing Commands/Command Sequences .............................. 9 Simultaneous Read/Write Operations with Zero Latency ....... 10 Standby Mode ........................................................................ 10 Automatic Sleep Mode ........................................................... 10 RESET#: Hardware Reset Pin ............................................... 11 Output Disable Mode .............................................................. 11 Table 2. Am29DL800BT Top Boot Sector Architecture ..................12 Table 3. Am29DL800BB Bottom Boot Sector Architecture .............13 Autoselect Mode ..................................................................... 13 Table 4. Am29DL800B Autoselect Codes (High Voltage Method) ..14 Sector Protection/Unprotection ............................................... 14 Temporary Sector Unprotect .................................................. 14 Figure 1. Temporary Sector Unprotect Operation........................... 14 Figure 2. In-System Sector Protect/Unprotect Algorithms .............. 15 Hardware Data Protection ...................................................... 16 Command Definitions . . . . . . . . . . . . . . . . . . . . . 16 Reading Array Data ................................................................ 16 Reset Command ..................................................................... 16 Autoselect Command Sequence ............................................ 16 Byte/Word Program Command Sequence ............................. 17 Figure 3. Program Operation .......................................................... 18 Chip Erase Command Sequence ........................................... 18 Sector Erase Command Sequence ........................................ 18 Erase Suspend/Erase Resume Commands ........................... 19 Figure 4. Erase Operation............................................................... 19 Command Definitions ............................................................. 20 Table 5. Am29DL800B Command Definitions ................................20 Write Operation Status . . . . . . . . . . . . . . . . . . . . . 21 DQ7: Data# Polling ................................................................. 21 Figure 5. Data# Polling Algorithm ................................................... 21 RY/BY#: Ready/Busy# ........................................................... 22 DQ6: Toggle Bit I .................................................................... 22 DQ2: Toggle Bit II ................................................................... 22 Reading Toggle Bits DQ6/DQ2 ............................................... 22 Figure 6. Toggle Bit Algorithm........................................................ 23 DQ5: Exceeded Timing Limits ................................................ 23 DQ3: Sector Erase Timer ....................................................... 23 Table 6. Write Operation Status ......................................................24 Absolute Maximum Ratings . . . . . . . . . . . . . . . . 25 Figure 7. Maximum Negative Overshoot Waveform ..................... 25 Figure 8. Maximum Positive Overshoot Waveform....................... 25 Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 25 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 9. ICC1 Current vs. Time (Showing Active and Automatic Sleep Currents) .............................................................................. 27 Figure 10. Typical ICC1 vs. Frequency ........................................... 27 Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 11. Test Setup.................................................................... 28 Table 7. Test Specifications ........................................................... 28 Key to Switching Waveforms . . . . . . . . . . . . . . . 28 Figure 12. Input Waveforms and Measurement Levels ................. 28 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 13. Read Operation Timings ............................................... 29 Figure 14. Reset Timings ............................................................... 30 Figure 15. BYTE# Timings for Read Operations............................ 31 Figure 16. BYTE# Timings for Write Operations............................ 31 Erase and Program Operations .............................................. 32 Figure 17. Program Operation Timings.......................................... 33 Figure 18. Chip/Sector Erase Operation Timings .......................... 33 Figure 19. Back-to-Back Read/Write Cycle Timings ...................... 34 Figure 20. Data# Polling Timings (During Embedded Algorithms). 34 Figure 21. Toggle Bit Timings (During Embedded Algorithms)...... 35 Figure 22. DQ2 vs. DQ6................................................................. 35 Figure 23. Temporary Sector Unprotect Timing Diagram .............. 36 Figure 24. Sector Protect/Unprotect Timing Diagram .................... 36 Alternate CE# Controlled Erase/Program Operations ............ 37 Figure 25. Alternate CE# Controlled Erase/Program Operation Timings.......................................................................... 38 Erase and Programming Performance . . . . . . . 39 Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 39 TSOP and SO Pin Capacitance . . . . . . . . . . . . . . 39 Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 40 TS 048—48-Pin Standard TSOP ............................................ 40 FBB048 —48-Ball Fine-Pitch Ball Grid Array (FBGA), 6 x 9 mm package .................................................................. 41 SO 044—44-Pin Small Outline .............................................. 42 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 43 |
Аналогичный номер детали - AM29DL800BB120WBC |
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Аналогичное описание - AM29DL800BB120WBC |
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