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74LVQ138SJX датащи(PDF) 2 Page - Fairchild Semiconductor |
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74LVQ138SJX датащи(HTML) 2 Page - Fairchild Semiconductor |
2 / 6 page www.fairchildsemi.com 2 Functional Description The LVQ138 high-speed 1-of-8 decoder/demultiplexer accepts three binary weighted inputs (A0, A1, A2) and, when enabled, provides eight mutually exclusive active- LOW outputs (O0–O7). The LVQ138 features three Enable inputs, two active-LOW (E1, E2) and one active-HIGH (E3). All outputs will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four LVQ138 devices and one inverter (see Figure 1). The LVQ138 can be used as an 8-output demultiplexer by using one of the active LOW Enable inputs as the data input and the other Enable inputs as strobes. The Enable inputs which are not used must be permanently tied to their appropriate active-HIGH or active- LOW state. Truth Table H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. FIGURE 1. Expansion to 1-of-32 Decoding Inputs Outputs E1 E2 E3 A0 A1 A2 O0 O1 O2 O3 O4 O5 O6 O7 H X XX X X HH HHH HHH X H XX X X HH HHH HHH X X L X X X HH HHH HHH L L H L L L L H HHH HHH L L H H L L H L HHH HHH L L H L H L HH L H H HHH L L H H H L HH H L H HHH L L H L L HHH HH L HHH L L H H L HHH HHH L H H L L H L H HHH HHH H L H L L H H H HHH HHH HH L |
Аналогичный номер детали - 74LVQ138SJX |
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Аналогичное описание - 74LVQ138SJX |
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