V

DD

RSET

STAT

OV

FLTB

UV

GND

PG

BYP

FLTR

A

C

RSVD

GATE

TPS2410

TPS2411

SLVS727B – NOVEMBER 2006 – REVISED FEBRUARY 2007

PW PACKAGE

(TOP VIEW)

TERMINAL FUNCTIONS

TERMINAL

I/O

DESCRIPTION

NAME

NO.

1

PWR

≥ 3 V.

Connect a resistor to ground to program the turn-off threshold. Leaving RSET open results in a slightly

RSET

2

I

STAT is a logical representation of the state of the internal gate-driver. A high output indicates that the

STAT

3

O

Open drain fault output. Fault is active (low) for any of the following conditions:

1.

FLTB

4

O

2.

GATE should be high but is not.

3.

The MOSFET should be ON but the forward voltage exceeds 0.4 V.

OV is a voltage monitor that contributes to the PG output, and also causes the MOSFET to turn off if it is

OV

5

I

above the 0.6-V threshold. OV is programmable via an external resistor divider. An OV voltage above 0.6 V

indicates a bus voltage that is too high.

UV is a voltage monitor that contributes to the PG output. The UV input has a 0.6 V threshold and is

UV

6

I

programmable via an external resistor divider. A UV voltage above 0.6V indicates a bus voltage that is above

its minimum acceptable voltage. A low UV input does not effect the gate drive.

GND

7

PWR

Device ground.

GATE

8

O

Connect to the gate of the external MOSFET. Controls the MOSFET to emulate a low forward-voltage diode.

RSVD

9

PWR

This pin must be connected to GND.

Voltage sense input that connects to the simulated diode cathode. Connect to the MOSFET drain in the

C

10

I

typical configuration.

Voltage sense input that connects to the simulated diode anode. A also serves as the reference for the

A

11

I

charge-pump bias supply on BYP. Connect to the MOSFET source in the typical configuration.

A capacitor connected from FLTR to A filters the input to the fast comparator. Filtering allows the TPS2410 to

FLTR

12

I

ignore spurious transients on the A and C inputs. This pin may be left open to achieve the fastest response

time.

BYP

13

I/O

Connect a storage capacitor from BYP to A to filter the gate drive supply voltage.

An open-drain Power Good indicator. PG is open if the UV input is above its threshold, the OV is below its

PG

14

O

threshold, and the internal UVLO is satisfied.

6

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