Preliminary Specification
aMC8500
Electrical Characteristics
(VDD = 12 V, TA = 25°C, unless otherwise noted. Specifications subject to change without notice [Note 3].)
- 3 -
© Andigilog, Inc. 2006
www.andigilog.com
August 2006 - 70A04018
Parameter
Symbol
Min
Typ
Max
Units
SPEED CONTROL
(Pin 10) and MINIMUM SPEED SET (Pin 6)
Input Threshold Voltage
Pin 14 = Gnd
0% Drive Conduction
100% Drive Conduction
Pin 14 = Open
0% Drive Conduction
100% Drive Conduction
Vth(0%)
Vth (100%)
Vth(0%)
Vth(100%)
0.95
2.85
2.85
0.95
1.0
3.0
3.0
1.0
1.05
3.15
3.15
1.05
V
Speed Control Input Threshold Voltage for Power Down (IO(ref) ≤1.0 mA)
Input Voltage Below 0% Drive Conduction, Vth(0%), Pin 14 = Gnd
Input Voltage Above 0% Drive Conduction, Vth(0%), Pin 14 = Open
Vth(PD)
-
-
20
20
-
-
mV
Speed Control Input PWM Signal Transition Time
Maximum allowable rise or fall time for digital control
tr/tf
-
-
50
µs
Input Bias Current, (Vin = 3.5 V)
IIB
-
1.0
-
µA
Modulation Frequency
fPWM
-
30
-
kHz
SLOPE SELECT
(Pin 14)
Input Threshold Voltage
Low State
Increasing voltage at Pin 6, 10 causes increase in drive conduction
High State
Increasing voltage at Pin 6, 10 causes decrease in drive conduction
VIL(S)
VIH(S)
-
2.8
-
-
1.0
-
V
Low State Input Pull-Up Current (VIL(S) = 0 V)
II(S)
-
10
-
µA
HALL AMPLIFIER
(Pin 3, 4)
Input Differential Voltage Sensitivity
Required signal level to enable drive commutation
VID(Hall)
-
20
40
mVpp
Input Hysteresis Voltage (Vin = 3.5 V)
VIH(Hall)
-
10
-
mV
Input Resistance
RIN(Hall)
-
3.0
-
MΩ
Input Common Mode Voltage Range
VICM(Hall)
0 to
VDD
-0.3
to
VDD
+0.3
-
V
OP AMP
(Pin 7, 8, 9)
Input Offset Voltage (Vin = 3.5V)
VIO
-
2.0
-
mV
Input Bias Current (Vin = Gnd)
IIB
-
50
-
nA
Input Common Mode Voltage Range
VICM(OA)
-
0 to
4.2
-
V
Open Loop Voltage Gain
AVOL
80
100
-
dB
Gain Bandwidth Product (f = 10 kHz)
GBW
-
70
-
kHz
Output Voltage Swing
High State (Isource = 5.0 mA to Gnd)
Low State (Isink = 5.0 mA to VDD)
VOH(OA)
VOL(OA)
-
-
VDD
-1.5
0.5
-
-
V