поискавой системы для электроныых деталей |
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TDA4851 датащи(PDF) 9 Page - NXP Semiconductors |
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TDA4851 датащи(HTML) 9 Page - NXP Semiconductors |
9 / 17 page November 1992 9 Philips Semiconductors Preliminary specification Horizontal and vertical deflection controller for VGA/XGA and autosync monitors TDA4851 Vertical differential output Fig.7 Io differential output current between pins 5 and 6 (peak-to-peak value) mode 3; I13 >−135 µA; R15 =22kΩ 0.9 1.0 1.1 mA maximum offset-current error Io =1mA −− ±2.5 % maximum linearity error −− ±1.5 % Vertical amplitude adjustment (in percentage of output signal) V13 input voltage − 5.0 − V I13 adjustment current Io max (100%) −110 −120 −135 µA Io min (typically 58%) − 0 −µA ∆Io/∆t VGA mode-dependent pre-settings activated by an external resistor on pin 7 Table 1; note 1 Mode 1 116.2 116.8 117.4 % Mode 2 101.6 102.2 102.8 % Mode 3 − 100 − % Mode 4 − 100 − % autosync operation (VGA operation disabled) V7 < 50 mV − 100 − % Horizontal comparator PLL1 V17 upper control voltage limitation − 5.9 − V lower control voltage limitation − 5.1 − V I17 control current Fig.6 −±0.083I18 − mA Horizontal oscillator fosc centre frequency R18 = 2.4 kΩ (pin 18); C19 = 10 nF (pin 19) − 31.45 − kHz deviation of centre frequency −− ±3% temperature coefficient 0 +200 +300 10-6/K ϕ H/tH relative holding/catching range ±6 ±6.5 ±7.3 % I18 external oscillator current −0.5 −−4.3 mA V18 voltage at reference current input (pin 18) 2.35 2.5 2.65 V Horizontal PLL2 Fig.6 V2 upper clamping level of flyback input I2 =6mA − 5.5 − V lower clamping level of flyback input I2 = −1mA −−0.75 − V H-flyback slicing level − 3.0 − V td/tH delay between middle of sync and middle of H-flyback related to tH − 3.0 − % V20 upper control voltage limitation − 6.2 − V lower control voltage limitation − 4.8 − V I20 control current −±0.083I18 −µA ∆t/tH PLL2 control range related to tH 30 −− % SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT |
Аналогичный номер детали - TDA4851 |
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Аналогичное описание - TDA4851 |
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