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TDA9847 датащи(PDF) 6 Page - NXP Semiconductors |
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TDA9847 датащи(HTML) 6 Page - NXP Semiconductors |
6 / 28 page 1995 May 23 6 Philips Semiconductors Preliminary specification TV and VTR stereo/dual sound processor with digital identification TDA9847 FUNCTIONAL DESCRIPTION AF signal handling The input AF signals, derived from the two sound carriers, are processed in analog form using operational amplifiers. De-matrixing uses the technique of two amplifiers processing the AF signals. Finally, a source selector provides the facility to route the mono signal through to the outputs (‘forced mono’). De-emphasis is performed by two RC low-pass filter networks with internal resistors and external capacitors. This provides a frequency response with the tolerances given in Fig.4. A source selector, controlled via the control input ports allows selection of the different modes of operation in accordance with the transmitted signal. The device was designed for a nominal input signal (FM: 54% modulation is equivalent to ∆f= ±27 kHz) of 250 mV RMS value (V i1 and Vi2) and for a nominal input signal (AM: m = 0.54) of 500 mV RMS value (Vi1), respectively 250 mV RMS (Vi3 and Vi4). A nominal gain of 6 dB for Vi1 and Vi2 signals (0 dB for Vi1 signal (AM sound)) and 6 dB for Vi3 and Vi4 signals is built-in. By using rail-to-rail operational amplifiers, the clipping level (THD ≤ 1.5%) is 1.60 V RMS for VP = 5 V and 2.65 V RMS for VP = 8 V at outputs Vo1 to Vo3 and Vo4. Care has been taken to minimize switching plops. Also total harmonic distortion and random noise are considerably reduced. Identification The pilot signal is fed via an external RC high-pass filter and single tuned LC band-pass filter to the input of a gain controlled amplifier. The external LC band-pass filter in combination with the external RC high-pass filter should have a loaded Q-factor of approximately 40 to 50 to ensure the highest identification sensitivity. By using a fixed coil ( ±5%) to save the alignment (see Fig.2), a Q-factor of approximately 12 is proposed. This may cause a loss in sensitivity of approximately 2 to 3 dB. A digital PLL circuit generates a reference carrier, which is synchronized with the pilot carrier. This reference carrier and the gain controlled pilot signal are fed to the AM-synchronous demodulator. The demodulator detects the identification signal, which is fed through a low-pass filter with external capacitor CLP (pin 5) to a Schmitt trigger for pulse shaping and suppression of LOW level spurious signal components. This is a measure against mis-identification. The identification signal is amplified and fed through an AGC low-pass filter with external capacitor CAGC (pin 4) to obtain the AGC voltage for controlling the gain of the pilot signal amplifier. The identification stages consist of two digital PLL circuits with digital synchronous demodulation and digital integrators to generate the stereo or dual sound identification bits which can be indicated via LEDs. A 10 MHz crystal oscillator provides the reference clock frequency. The corresponding detection bandwidth is larger than ±50 Hz for the pilot carrier signal, so that fp-variations from the transmitter can be tracked in the event of missing synchronization with the horizontal frequency fH. However the detection bandwidth for the identification signal is made small ( ±1 Hz) to reduce mis-identification. Figure 2 shows an example of the alignment-free fp band-pass filter. To achieve the required QL of around 12, the Q0 at fp of the coil was chosen to be around 25 (effective Q0 including PCB influence). Using coils with other Q0, the RC-network (RFP and CFP) has to be adapted accordingly. It is assumed that the loss factor tan δ of the resonance capacitor is ≤0.01 at fp. Copper areas under the coil might influence the loaded Q and have to be taken into account. Care has also to be taken in environments with strong magnetic fields when using coils without magnetic shielding. Control input ports The complete IC is controlled by the four control input ports C1, C2, C3 and C4. Which AF output channel pair can be selected is determined by the control input Port C4 [LOW: main; HIGH: SCART; 3-state: preset position (see Section “General information”)]. With the other control input ports C1, C2 and C3 the user can select between different AF sources in accordance with the transmitter status (see Tables 1 and 2). Finally, Schmitt triggers are added in the input Port interfaces to suppress spikes on the control lines C1, C2, C3 and C4. After a Power-On Reset (POR) both registers are reset (mute mode for both AF channel pairs). After some time ( ≤1 ms), when the POR is automatically deactivated, the switch positions of the main channel (C4 = LOW) are changed in accordance with the other control input Port levels. If C4 is HIGH after a POR, the switch positions of the SCART channel cannot change. The reason is, that the main register is reset (mute mode; see Table 1). Thus, at first the main register byte has to be changed out of the mute function, e.g. sound mute. |
Аналогичный номер детали - TDA9847 |
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Аналогичное описание - TDA9847 |
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