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TMP19A43FD датащи(PDF) 3 Page - Toshiba Semiconductor

номер детали TMP19A43FD
подробное описание детали  32-bit RISC Microprocessor
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производитель  TOSHIBA [Toshiba Semiconductor]
домашняя страница  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP19A43FD датащи(HTML) 3 Page - Toshiba Semiconductor

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TMP19A43
TMP19A43 (rev2.0) 1-2
Overview and Features
(1)
TX19A processor core
1)
Improved code efficiency and operating performance have been realized through the use of two ISA
(Instruction Set Architecture) modes - 16- and 32-bit ISA modes.
The 16-bit ISA mode instructions are compatible with the MIPS16
TMASE instructions of superior
code efficiency at the object level.
The 32-bit ISA mode instructions are compatible with the TX39 instructions of superior operating
performance at the object level.
2)
Both high performance and low power dissipation have been achieved.
High performance
Almost all instructions can be executed with one clock.
High performance is possible via a three-operand operation instruction.
5-stage pipeline
Built-in high-speed memory
DSP function: A 32-bit multiplication and accumulation operation can be executed with one clock.
Low power dissipation
Optimized design using a low power dissipation library
Standby function that stops the operation of the processor core
3)
High-speed interrupt response suitable for real-time control
Independency of the entry address
Automatic generation of factor-specific vector addresses
Automatic update of interrupt mask levels
(2) Internal program memory and data memory
Product name
Built-in ROM
Built-in RAM
TMP19A43CZXBG
384Kbyte
20Kbyte
TMP19A43CDXBG *
512Kbyte
24Kbyte
TMP19A43FZXBG *
384Kbyte (Flash)
20Kbyte
TMP19A43FDXBG
512Kbyte (Flash)
24Kbyte
The product indicated by an asterisk * is under development.
ROM correction function: 1 word
× 8 blocks, 8 words × 4 blocks
(3) External memory expansion
Expandable to 16 megabytes (for both programs and data)
External data bus:
Separate bus/multiplexed bus
: Coexistence of 8- and 16-bit widths is possible.
Chip select/wait controller
: 4 channels
(4) DMA controller
: 8 channels (2 interrupt factors)
Activated by an interrupt or software
Data to be transferred to internal memory, internal I/O, external memory, and external I/O
(5) 16-bit timer
: 16 channels
16-bit interval timer mode
16-bit event counter mode
16-bit PPG output (every 4 channels, synchronous outputs are possible)
Input capture function
2-phase pulse input counter function (4 channels assigned to perform this function): Multiplication-
by-4 mode


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