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LM2623ALD датащи(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали LM2623ALD
подробное описание детали  General Purpose, Gated Oscillator Based, DC/DC Boost Converter
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM2623ALD датащи(HTML) 4 Page - National Semiconductor (TI)

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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
SW Pin Voltage
−0.5 V to 14.5V
BOOT, V
DD, EN and FB Pins
−0.5V to 10V
FREQ Pin
100µA
T
Jmax (Note 2)
150˚C
Storage Temperature Range
−65˚C to +150˚C
Lead Temp. (Soldering, 5 sec)
260˚C
Power Dissipation (T
A=25˚C)
(Note 2)
500mW
ESD Rating (Note 3)
2kV
Operating Conditions (Note 1)
V
DD Pin
3V to 5V
FB, EN Pins
0 to V
DD
BOOT Pin
0 to 10V
Ambient Temperature (T
A)
−40˚C to +85˚C
Electrical Characteristics
Limits in standard typeface are for T
J = 25˚C, and limits in boldface type apply over the full operating temperature range of
−40˚C to +85˚C. Unless otherwise specified: V
DD=VOUT= 3.3V.
Symbol
Parameter
Condition
Typ
Min
Max
Units
V
DD_ST
Start-Up Supply Voltage 25˚C
I
LOAD = 0mA (Note 4)
1.1
V
V
IN_OP
Minimum Operating Supply
Voltage (once started)
I
LOAD = 0mA
0.65
.8
V
V
FB
FB Pin Voltage
1.24
1.2028
1.2772
V
V
OUT_MAX
Maximum Output Voltage
14
V
η
Efficiency
V
IN = 3.6V; VOUT = 5V; ILOAD =
500mA
87
%
V
IN = 2.5V; VOUT = 3.3V; ILOAD
= 200mA
87
D
Switch Duty Cycle
17
%
I
DD
Operating Quiescent Current
(Note 5)
FB Pin > 1.3V; EN Pin at V
DD
80
110
µA
I
SD
Shutdown Quiescent Current
(Note 6)
V
DD, BOOT and SW Pins at
5.0V; EN Pin <200mV
0.01
2.5
µA
I
CL
Switch Peak Current Limit
LM2623A
2. 85
2.2
A
I
C
Switch Peak Current Limit
LM2623
1.2
A
R
DS_ON
MOSFET Switch On
Resistance
0.17
0.26
θ
JA
Thermal Resistance
MM Package, Junction to
Ambient(Note 2)
240
˚C/W
θ
JA
Thermal Resistance
LLP Package, Junction to
Ambient(Notes 2, 8)
40
˚C/W
θ
JA
Thermal Resistance
LLP Package, Junction to
Ambient(Notes 2, 9)
56
˚C/W
Enable Section
V
EN_LO
EN Pin Voltage Low (Note 7)
0.15V
DD
V
V
EN_HI
EN Pin Voltage High (Note 7)
0.7V
DD
V
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device
outside of its rated operating conditions.
Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature), θJA (junction to
ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is Pdmax =(Tjmax -TA)/ θJA or the number
given in the Absolute Maximum Ratings, whichever is lower.
Note 3: The human body model is a 100 pF capacitor discharged through a 1.5 k
Ω resistor into each pin. For Pin 8 (SW) the ESD rating is 1.0 kV.
Note 4: VDD tied to Boot and EN pins. Frequency pin tied to VDD through 121K resistor. VDD_ST =VDD when startu-up occurs. VIN is VDD + D1 voltage (usually
10-50 mv at start-up)
Note 5: This is the current into the VDD pin.
Note 6: This is the total current into pins VDD, BOOT, SW and FREQ.
Note 7: When the EN pin is below VEN_LO, the regulator is shut down; when it is above VEN_HI, the regulator is operating.
www.national.com
4


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