SN74CBTLV16235

LOW VOLTAGE 18BIT 1OF2 FET MULTIPLEXER/DEMULTIPLEXER

SCDS060F − MARCH 1998 − REVISED OCTOBER 2003

3

POST OFFICE BOX 655303

simplified schematic, each FET switch

A

(OE)

B

−0.5 V to 4.6 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

−0.5 V to 4.6 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous channel current

128 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

−50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance,

55

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

−65

°C to 150°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions (see Note 3)

MIN

MAX

UNIT

VCC

Supply voltage

2.3

3.6

V

VIH

High-level control input voltage

VCC = 2.3 V to 2.7 V

1.7

V

VIH

High-level control input voltage

VCC = 2.7 V to 3.6 V

2

V

VIL

Low-level control input voltage

VCC = 2.3 V to 2.7 V

0.7

V

VIL

Low-level control input voltage

VCC = 2.7 V to 3.6 V

0.8

V

TA

Operating free-air temperature

−40

85

°C

NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to TI application report

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.