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TEA5040 датащи(PDF) 2 Page - STMicroelectronics |
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TEA5040 датащи(HTML) 2 Page - STMicroelectronics |
2 / 12 page Y (R - Y) (B - Y) 7 6 5 4 3 2 10 11 12 40 39 37 38 35 VI DEO SWITCH SUPER SAND CASTLE DETECTOR 30 14 13 15 34 36 BEAM CURRENT LIMIT 1 31 32 28 27 LOGI C BUS DECODER 23 VI DE O OUT EXT INT EN CLK DATA CONTRAST SAT. BRIGHTNESS SAT. Y (R - Y ) (B - Y ) R G B R G B R’ G’ B’ Y (R - Y ) (B - Y) INT SY NC. + 12V DRIVE ME MORIE S CUT OFF ME MORIE S CATHODE CURRENTS R OUT OUT B OUT G RE F V X3 X3 DELAY TIME 26 29 BLOCK DIAGRAM GENERAL DESCRIPTION Brief Description This integrated circuit incorporates the following features : - a synchro and two video inputs - a fixed video output - a switchable video output - normal Y, R-Y, B-Y TV mode inputs - double set of R, G, B inputs - brightness, contrast and saturation controls as well on a R, G, B picture as on a normal TV picture - digital control inputs by means of serial bus - peak beam current limitation - average beam current limitation - automatic drive and cut-off controls Block Diagram Description BUS DECODER A 3 lines bus (clock, data, enable) delivered by the microcontroller of the TV-set enters the videoproc- essor integrated circuit (pins 13-14-15). A control system acts in such a way that only a 9-bit word is taken into account by the videoprocessor. Six of the bits carry the data, the remaining three carry the address of the subsystem. Fun ction Address Number of Bits Brightness Control 0 5 Contrast Control 1 5 Colour on/off Selection 2 1 Insertion Allowed 3 1 Sync/Async Mode 4 1 Int/Ext Video Switching 5 1 B-Y Saturation Control 6 6 R-Y Saturation Control 7 6 TEA5040 2/12 |
Аналогичный номер детали - TEA5040 |
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Аналогичное описание - TEA5040 |
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