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UC2914DWTR датащи(PDF) 6 Page - Texas Instruments

номер детали UC2914DWTR
подробное описание детали  5-V TO 35-V HOT SWAP POWER MANAGER
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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UC2914DWTR датащи(HTML) 6 Page - Texas Instruments

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UC2914
UC3914
SLUS425C − DECEMBER 2003 − REVISED JULY 2004
6
www.ti.com
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
I/O
DESCRIPTION
CT
15
I/O
A capacitor is connected to this pin in order to set the maximum fault time. The minimum fault time must be
more than the time to charge external load capacitance. The fault time is defined as shown in equation (1)
where ICH = 100 µA + IPL, where IPL is the current into the power limit pin. Once the fault time is reached the
output shuts down for a time given by equation (2) where IDIS is nominally 3 µA..
FAULT
10
O
Open collector output which pulls low upon any of the following conditions: timer fault, shutdown, UVLO. This
pin MUST be pulled up to VVCC or another supply through a suitable impedance.
GND
1
Ground reference for the device.
IMAX
16
I
This pin programs the maximum allowable sourcing current. Since REF is a −2-V reference (with respect to
VCC), a voltage divider can be derived from VCC to REF in order to generate the program level for the IMAX
pin. The current level at which the output appears as a current source is equal to the voltage on the IMAX pin,
with respect to VCC, divided by the current sense resistor. If desired, a controlled current startup can be pro-
grammed with a capacitor on IMAX to VCC.
LR
13
I
If this pin is held high and a fault occurs, the timer is prevented from resetting the fault latch when CT is dis-
charged below the reset comparator threshold. The part does not retry until this pin is brought to a logic low or a
power-on-reset occurs. Pulling this pin low before the reset time is reached does not clear the fault until the
reset time is reached. Floating or holding this pin low results in the part repeatedly trying to reset itself if a fault
occurs.
OUT
11
O
Output drive to the MOSFET pass element. Internal clamping ensures that the maximum VGS drive is 15 V.
OSC
6
O
Complementary output drivers for intermediate charge pump stages. A 0.01-
µF capacitor should be placed
OSCB
5
O
Complementary output drivers for intermediate charge pump stages. A 0.01-
µF capacitor should be placed
between OSC and PMP, and OSCB and PMPB.
PLIM
14
I
This feature ensures that the average MOSFET power dissipation is controlled. A resistor is connected from this
pin to VCC. Current flows into PLIM, adding to the fault timer charge current, reducing the duty cycle from the
typical 3% level. When IPL >> 100 µA then the average MOSFET power dissipation is given by equation (3).
PMP
9
I
Complementary pins which couple charge pump capacitors to internal diodes and are used to provide charge
PMPB
8
I
Complementary pins which couple charge pump capacitors to internal diodes and are used to provide charge
to the reservoir capacitor tied to VPUMP. Typical capacitor values used are 0.01-
µF.
REF
18
O
−2-V reference with respect to VCC used to program the IMAX pin voltage. A 0.1-
µF ceramic or tantalum ca-
pacitor MUST be tied between this pin and VCC to ensure proper operation of the device.
SD
4
I
When this TTL-compatible input is brought to a logic low, the output of the linear amplifier is driven low, FAULT
is pulled low and the device is put into a low power mode. The ABSOLUTE maximum voltage that can be
placed on this pin is 12 V.
SENSE
17
I
Input voltage from the current sense resistor. When there is greater than 50 mV on this pin with respect to
VCC, a fault is sensed and CT begins to charge.
VCC
2
I
Input voltage to the device. The voltage range is from 4.5 V to 35 V. The minimum input voltage required for
operation is 4.5 V.
VOUTS
12
O
Source connection of external N-channel MOSFET and sensed output voltage of load.
VPUMP
7
O
Charge pump output voltage. A capacitor should be tied between this pin and VOUTS with a typical value be-
ing 0.01-
µF.
T
FAULT +
2
C
T
I
CH
T
SD +
2
C
T
I
DIS
P
FET(avg) + IMAX
3
10*6
R
PL
(1)
(2)
(3)


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