LM3S328 Data Sheet
April 27, 2007
5
Preliminary
10.4
Register Map ..................................................................................................................................... 183
10.5
Register Descriptions......................................................................................................................... 184
11.
Analog-to-Digital Converter (ADC) .................................................................................. 205
11.1
Block Diagram ................................................................................................................................... 205
11.2
Functional Description ....................................................................................................................... 206
11.2.1 Sample Sequencers .......................................................................................................................... 206
11.2.2 Module Control .................................................................................................................................. 207
11.2.3 Hardware Sample Averaging Circuit.................................................................................................. 207
11.2.4 Analog-to-Digital Converter ............................................................................................................... 207
11.2.5 Test Modes ........................................................................................................................................ 207
11.2.6 Internal Temperature Sensor............................................................................................................. 208
11.3
Initialization and Configuration........................................................................................................... 208
11.3.1 Module Initialization ........................................................................................................................... 208
11.3.2 Sample Sequencer Configuration...................................................................................................... 208
11.4
Register Map ..................................................................................................................................... 209
11.5
Register Descriptions......................................................................................................................... 210
12.
Universal Asynchronous Receivers/Transmitters (UARTs).......................................... 235
12.1
Block Diagram ................................................................................................................................... 236
12.2
Functional Description ....................................................................................................................... 236
12.2.1 Transmit/Receive Logic ..................................................................................................................... 236
12.2.2 Baud-Rate Generation....................................................................................................................... 237
12.2.3 Data Transmission............................................................................................................................. 238
12.2.4 FIFO Operation .................................................................................................................................. 238
12.2.5 Interrupts............................................................................................................................................ 238
12.2.6 Loopback Operation .......................................................................................................................... 239
12.3
Initialization and Configuration........................................................................................................... 239
12.4
Register Map ..................................................................................................................................... 240
12.5
Register Descriptions......................................................................................................................... 241
13.
Synchronous Serial Interface (SSI) ................................................................................. 271
13.1
Block Diagram ................................................................................................................................... 271
13.2
Functional Description ....................................................................................................................... 272
13.2.1 Bit Rate Generation ........................................................................................................................... 272
13.2.2 FIFO Operation .................................................................................................................................. 272
13.2.3 Interrupts............................................................................................................................................ 272
13.2.4 Frame Formats .................................................................................................................................. 273
13.3
Initialization and Configuration........................................................................................................... 280
13.4
Register Map ..................................................................................................................................... 281
13.5
Register Descriptions......................................................................................................................... 282
14.
Inter-Integrated Circuit (I2C) Interface ............................................................................ 306
14.1
Block Diagram ................................................................................................................................... 306
14.2
Functional Description ....................................................................................................................... 306
14.2.1 I2C Bus Functional Overview............................................................................................................. 307
14.2.2 Available Speed Modes ..................................................................................................................... 316
14.3
Initialization and Configuration........................................................................................................... 317
14.4
Register Map ..................................................................................................................................... 318
14.5
Register Descriptions (I2C Master).................................................................................................... 318
14.6
Register Descriptions (I2C Slave)...................................................................................................... 332