Figure 14-12. Master Burst SEND after Burst RECEIVE ........................................................................ 353
Figure 14-13. Slave Command Sequence ............................................................................................ 354
Figure 15-1.
CAN Module Block Diagram ........................................................................................... 379
Figure 15-2.
CAN Bit Time ................................................................................................................ 386
Figure 16-1.
Pin Connection Diagram ................................................................................................ 419
Figure 19-1.
Load Conditions ............................................................................................................ 436
Figure 19-2.
I2C Timing ..................................................................................................................... 438
Figure 19-3.
SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing Measurement .............. 438
Figure 19-4.
SSI Timing for MICROWIRE Frame Format (FRF=10), Single Transfer ............................. 439
Figure 19-5.
SSI Timing for SPI Frame Format (FRF=00), with SPH=1 ................................................. 439
Figure 19-6.
JTAG Test Clock Input Timing ......................................................................................... 440
Figure 19-7.
JTAG Test Access Port (TAP) Timing .............................................................................. 441
Figure 19-8.
JTAG TRST Timing ........................................................................................................ 441
Figure 19-9.
External Reset Timing (RST) .......................................................................................... 442
Figure 19-10. Power-On Reset Timing ................................................................................................. 442
Figure 19-11. Brown-Out Reset Timing ................................................................................................ 442
Figure 19-12. Software Reset Timing ................................................................................................... 443
Figure 19-13. Watchdog Reset Timing ................................................................................................. 443
Figure 20-1.
100-Pin LQFP Package .................................................................................................. 444
9
November 30, 2007
Preliminary
LM3S2016 Microcontroller