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ADP120-AUJZ15R7 датащи(PDF) 11 Page - Analog Devices

номер детали ADP120-AUJZ15R7
подробное описание детали  100 mA, Low Quiescent Current, CMOS Linear Regulator
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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ADP120-AUJZ15R7 датащи(HTML) 11 Page - Analog Devices

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ADP120
Rev. A | Page 11 of 20
THEORY OF OPERATION
The ADP120 is a low quiescent current, low dropout linear
regulator that operates from 2.3 V to 5.5 V and provides up
to 100 mA of output current. Drawing a low 22 μA of quies-
cent current (typical) at full load makes the ADP120 ideal
for battery-operated portable equipment. Shutdown current
consumption is typically 100 nA.
Optimized for use with small 1 μF ceramic capacitors, the
ADP120 provides excellent transient performance.
VIN
VOUT
R1
R2
GND
EN
SHORT CIRCUIT,
UVLO, AND
THERMAL
PROTECT
0.8V REFERENCE
SHUTDOWN
Figure 27. Internal Block Diagram
Internally, the ADP120 consists of a reference, an error amplifier,
a feedback voltage divider, and a PMOS pass transistor. Output
current is delivered via the PMOS pass device, which is controlled
by the error amplifier. The error amplifier compares the reference
voltage with the feedback voltage from the output and amplifies
the difference. If the feedback voltage is lower than the reference
voltage, the gate of the PMOS device is pulled lower, allowing
more current to pass and increasing the output voltage. If the
feedback voltage is higher than the reference voltage, the gate of
the PMOS device is pulled higher, allowing less current to pass
and decreasing the output voltage.
The ADP120 is available in 16 output voltage options, ranging
from 1.2 V to 3.3 V. The ADP120 uses the EN pin to enable and
disable the VOUT pin under normal operating conditions. When
EN is high, VOUT turns on; when EN is low, VOUT turns off.
For automatic startup, EN can be tied to VIN.


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