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ADE7761BARSZ-RL датащи(PDF) 10 Page - Analog Devices

номер детали ADE7761BARSZ-RL
подробное описание детали  Energy Metering IC with On-Chip Fault and Missing Neutral Detection
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

ADE7761BARSZ-RL датащи(HTML) 10 Page - Analog Devices

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ADE7761B
Rev. 0 | Page 10 of 24
TERMINOLOGY
Measurement Error
The error associated with the energy measurement made by the
ADE7761B is defined by
%
100
×
=
Energy
True
Energy
True
ADE7761B
by
Registered
Energy
Error
Percentage
Phase Error Between Channels
The high-pass filter (HPF) in the current channel has a phase
lead response. To offset this phase response and equalize the
phase response among channels, a phase correction network is
also placed in the current channel. The phase correction network
ensures a phase match between the current channels and the
voltage channels to within ±0.1° over a range of 45 Hz to
65 Hz and ±0.2° over a range of 40 Hz to 1 kHz.
Power Supply Rejection (PSR)
PSR quantifies the ADE7761B measurement error as a percentage
of reading when the power supplies are varied. For the ac PSR
measurement, a reading at nominal supplies (5 V) is taken.
A second reading is obtained with the same input signal levels
when an ac signal (175 mV rms/100 Hz) is introduced onto the
supplies. Any error introduced by this ac signal is expressed as
a percentage of reading (see the Measurement Error definition).
For the dc PSR measurement, a reading at nominal supplies (5 V)
is taken. A second reading is obtained with the same input signal
levels when the power supplies are varied ±5%. Any error
introduced is again expressed as a percentage of reading.
ADC Offset Error
This is the dc offset associated with the analog inputs to the ADCs.
With the analog inputs connected to AGND, the ADCs still see
a dc analog input signal. The magnitude of the offset depends on
the input gain and range selection (see the Typical Performance
Characteristics section). However, when HPFs are switched on,
the offset is removed from the current channels and the power
calculation is not affected by this offset.
Gain Error
The gain error in the ADE7761B ADCs is defined as the difference
between the measured output frequency (minus the offset) and
the ideal output frequency. It is measured with a gain of 1 in
Channel V1A. The difference is expressed as a percentage of the
ideal frequency, which is obtained from the transfer function
(see the Transfer Function section).
Gain Error Match
The gain error match is defined as the gain error (minus the offset)
obtained when switching between a gain of 1 or 16. It is expressed
as a percentage of the output ADC code obtained under a gain of 1.


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