AD7280

Preliminary Technical Data

Rev. PrD | Page 6 of 33

PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS

48 47 46 45 44 43 42

41 40 39

38 37

35

VT4

34

VT5

33

VT6

30

AVCC

31

AGND

32

VTTERM

36

VT3

29

VDRIVE

28

ALERTlo

27

ALERT

25

SDOlo

26

SDO

2

CB6

3

VIN5

4

CB5

7

VIN3

6

CB4

5

VIN4

1

VIN6

8

CB3

9

VIN2

10

CB2

12

CB1

11

VIN1

13 14 15 16 17 18 19 20 21 22 23 24

PIN 1

AD7280

TOP VIEW

Figure 2.

1

2

3

4

5

6

7

8

9

10

11

12

VIN6

CB6

VIN5

CB5

VIN4

CB4

VIN3

CB3

VIN2

CB2

VIN1

CB1

VT4

VT5

VT6

VTTERM

AGND

AVCC

VDRIVE

ALERTlo

ALERT

SDO

SDOlo

35

VT3

36

34

33

32

31

30

29

28

27

26

25

TOP VIEW

PIN 1

INDICATOR

AD7280

Figure 3.

Table 4.

Pin No.

Mnemonic

Description

1, 3, 5, 7,

9, 11, 13

Vin6 to

Vin0

Analog Input 0 to Analog Input 6. Analog input 0 should be connected to the base of the series connected

battery cells. Analog Input 1 should be connected to the top of cell 1, Analog Input 2 should be connected to

the top of cell 2, etc. The Analog Inputs are multiplexed into the on-chip track-and-hold allowing the potential

across each cell to be measured.

2, 4, 6, 8,

10, 12

CB6 to CB1

Cell Balance Outputs. These provide a voltage output which can be used to supply the gate drives of a cell

balancing transistor network. Each CB(n) output provides a 5V voltage output referenced to the absolute

voltage of Cell(n-1).

14

MASTER

Voltage Input. In an application with 2 or more AD7280s Daisy Chained the MASTER pin of the AD7280

through 10kOhm resistors.

15

PD

Power down Input. This input is used to power down the AD7280. When acting as master the PD input is

supplied from the DSP/uP. When acting as a slave on the Daisy Chain the PD input should be connected to the

PDhi output of the AD7280 immediately below it in potential in the Daisy Chain. This input can also be tied to

16

Positive Power Supply Voltage. This is the positive supply voltage for the high voltage analog input structure

AD7280. The supply must be greater than a minimum voltage of 7.5 V. In an application monitoring the cell

voltages of up to 6 series connected battery cells the supply voltage may be supplied directly from the cell with

17

Negative Power Supply Voltage. This is the negative supply voltage for the high voltage analog input structure

of the AD7280. This input should be at the same potential as the AGND voltage.

18

ADC core, is available on this pin for use external to the AD7280. Place 10 µF and 100 nF decoupling capacitors

19

voltage difference between them never exceeds 0.3 V even on a transient basis. This supply should be decoupled