1–1

1 Introduction

The TLC320AD57C provides high-resolution signal conversion from analog to digital using oversampling

sigma-delta technology. This device consists of two synchronous conversion paths. Also included is a

decimation filter after the modulator as shown in the functional block diagram. Other functions provide

analog filtering and on-chip timing and control.

A functional block diagram of the TLC320AD57C is included in section 1.2. Each block is described in the

Detailed Description section.

1.1

Features

•

Single 5-V Power Supply

•

•

18-Bit Resolution

•

Signal-to-Noise (EIAJ) of 97 dB

•

Dynamic Range of 95 dB

•

Total Signal-to-Noise+Distortion of 91 dB

•

•

Serial Port Interface

•

Differential Architecture

•

Power Dissipation of 200 mW. Power-Down Mode for Low-Power Applications

•

One Micron Advanced LinEPIC1Z

™ Process

1.2

Functional Block Diagram

Sigma-Delta

Modulator

Decimation

Filter

High-Pass

Filter

S

e

r

i

a

l

I

n

t

e

r

f

a

c

e

VREF

Sigma-Delta

Modulator

Decimation

Filter

High-Pass

Filter

Control

INLP

DOUT

Fsync

LRClk

OSFR

OSFL

SCLK

INLM

REFO

REFI

INRP

INRM

MCLK

CMODE

MODE0 – MODE2

LinEPIC1Z is a trademark of Texas Instruments Incorporated.