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TLC320AD80CPM датащи(PDF) 10 Page - Texas Instruments |
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TLC320AD80CPM датащи(HTML) 10 Page - Texas Instruments |
10 / 36 page 1–5 1.6 Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION AGND1 18 I Analog ground for sigma-delta DAC AGND2 45 I Analog ground for analog audio output drivers AGND3 52 I Analog ground for bandgap reference AUDIO LEFT 35 O Left channel line-level analog audio output. The AUDIO LEFT output driver provides line level signals (1 Vrms max) for line output. The AUDIO LEFT output is capable of driving a 600- Ω load. AUDIO MONO 39 O Monaural variable line-level analog audio output. The AUDIO MONO output signal is the sum of the AUDIO RIGHT and AUDIO LEFT outputs divided by 2. The output is capable of driving a 10-k Ω load. AUDIO RIGHT 38 O Right channel variable line-level analog audio output. The AUDIO RIGHT output driver provides line level signals (1 Vrms max) for line output. The AUDIO RIGHT output is capable of driving a 600- Ω load. AUX AUDIO1L 21 I Left channel auxiliary analog audio input 1 AUX AUDIO1R 23 I Right channel auxiliary analog audio input 1 AUX AUDIO2M 24 I Mono channel auxiliary analog audio input 2 ABCLK 12 I/O Auxiliary serial bit clock input. The ABCLK bit clock signal clocks the serial PCM data (ASDATA) into the TLC320AD80. ALRCLK 13 I/O Auxiliary left/right channel indicator. ALRCLK signifies whether the serial PCM data is associated with the left channel DAC or the right channel DAC. ASDATA 11 I Auxiliary serial PCM data input port. ASDATA can be configured as 16 or 18 bits with the most significant bit (MSB) first, 2’s complement format. AVDD1 14 I Analog 5-V power supply for the sigma-delta DAC AVDD2 44 I Analog 5-V power supply for the analog audio output drivers AVDD3 50 I Analog 5-V power supply for the bandgap reference BCLK 9 I Serial bit clock input. BCLK clocks the serial PCM data (SDATA) into the device. BGFLTR 46 I Bandgap reference filter. BGFLTR provides for noise filtering of the internal bandgap reference (2.25 V). BGFLTR requires a 0.1 µF capacitor to analog ground. This voltage node should be loaded only with a high-impedance dc load. CDIN 61 I SPI bus serial control data input. Data is transferred MSB first. CDIN specifies the channel specific attenuation and mute, serial PCM data format and rates, de-emphasis mode, audio input port selection, and stereo or monaural analog inputs. CDOUT 62 O SPI bus serial control data output port CS 59 I SPI bus chip select input (active low) DGND1 6 I Digital ground for the sigma-delta DAC DGND2 58 I Digital ground for the serial interface DVDD1 5 I Digital 5-V power supply for the sigma-delta DAC DVDD2 57 I Digital 5-V power supply for the serial interface EXT INL 26 I Left channel external analog audio input EXT INR 27 I Right channel external analog audio input |
Аналогичный номер детали - TLC320AD80CPM |
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Аналогичное описание - TLC320AD80CPM |
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