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UC3573 датащи(PDF) 3 Page - Texas Instruments |
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UC3573 датащи(HTML) 3 Page - Texas Instruments |
3 / 5 page 3 UC1573 UC2573 UC3573 3VREF: Precision 3V reference. Bypass with 100nF ca- pacitor. CS: Peak current limit sense pin. Senses the current across a current sense resistor placed between VCC and source of the PMOS Buck switch. OUT will be held high (PMOS buck switch off) if VCC – CS exceeds 0.4V. EAINV: Inverting input to error amplifier. VOUT sense feedback connected to this pin. The non-inverting input of the error amplifier is internally connected to: 3 2 VREF Volts. Connecting the EAINV pin to an external voltage greater than 2.6V commands the chip to go into a low current sleep mode. EAOUT: Output of error amplifier. Use EAOUT and EAINV for loop compensation components. GND: Circuit Ground. OUT: Gate drive for external PMOS switch connected be- tween VCC and the flyback inductor. OUT drives the gate of the PMOS switch between VCC and GND. RAMP: Oscillator and ramp for pulse width modulator. Frequency is set by a capacitor to GND by the equation F kCRAMP = • 1 15 Recommended operating frequency range is 10kHz to 200kHz. VCC: Input voltage supply to chip. Range is 4.75V to 30V. Bypass with a 1 µF capacitor. PIN DESCRIPTIONS ELECTRICAL CHARACTERISTICS: Unless otherwise specified, these parameters apply for TA = –55°C to +125°C for the UC1573, –40°C to +85°C for the UC2573, and 0°C to +70°C for the UC3573, VCC = 5V, CT = 680pF, TA = TJ. PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Sleep Mode Section Threshold 1.8 2.2 2.6 V Supply Current Section IVCC VCC = 30V 9 12 mA IVCC VCC = 30V, EAINV = 3V 50 150 A Typical Waveforms. UDG-94107 |
Аналогичный номер детали - UC3573 |
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Аналогичное описание - UC3573 |
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