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UC3637Q датащи(PDF) 4 Page - Texas Instruments

номер детали UC3637Q
подробное описание детали  Switched Mode Controller for DC Motor Drive
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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UC3637Q датащи(HTML) 4 Page - Texas Instruments

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UC1637
UC2637
UC3637
MODULATION SCHEMES
Case A Zero Deadtime (Equal voltage on Pin 9 and Pin 11)
In this configuration, maximum holding torque or stiffness
and position accuracy is achieved. However, the power in-
put into the motor is increased. Figure 3A shows this con-
figuration.
Case B Small Deadtime (Voltage on Pin 9 > Pin 11)
A small differential voltage between Pin 9 and 11 provides
the necessary time delay to reduce the chances of mo-
mentary short circuit in the output stage during transi-
tions, especially where power-amplifiers are used. Refer to
Figure 3B.
Case C Increased Deadtime and Deadband Mode
(Voltage on Pin 9 > Pin 11)
With the reduction of stiffness and position accuracy, the
power input into the motor around the null point of the
servo loop can be reduced or eliminated by widening the
window of the comparator circuit to a degree of accep-
tance. Where position accuracy and mechanical stiffness
is unimportant, deadband operation can be used. This is
shown in Figure 3C.
PWM Comparators
Two comparators are provided to perform pulse width
modulation for each of the output drivers. Inputs are un-
committed to allow maximum flexibility. The pulse width of
the outputs A and B is a function of the sign and ampli-
tude of the error signal. A negative signal at Pin 10 and 8
will lengthen the high state of output A and shorten the
high state of output B. Likewise, a positive error signal re-
verses the procedure. Typically, the oscillator waveform is
compared against the summation of the error signal and
the level set on Pin 9 and 11.
Figure 1. Oscillator Setup
Figure 2. Comparator Biasing
Output Drivers
Each output driver is capable of both sourcing and sinking
100mA steady state and up to 500mA on a pulsed basis
for rapid switching of either POWERFET or bipolar tran-
sistors. Output levels are typically -VS + 0.2V @50mA low
level and +VS - 2.0V @50mA high level.
Error Amplifier
The error amplifier consists of a high slew rate (15V/
µs)
op-amp with a typical 1MHz bandwidth and low output im-
pedance. Depending on the
±VS supply voltage, the com-
mon mode input range and the voltage output swing is
within 2V of the VS supply.
Under-Voltage Lockout
An under-voltage lockout circuit holds the outputs in the
low state until a minimum of 4V is reached. At this point,
all internal circuitry is functional and the output drivers are
enabled. If external circuitry requires a higher starting volt-
age, an over-riding voltage can be programmed through
the shutdown terminal as shown in Figure 4.
4


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