TDA9989 datasheet(8/48 Pages) NXP

номер детали	TDA9989

подробное описание детали	150 MHz pixel rate HDMI 1.3a transmitter with 3 쨈 8-bit video inputs and CEC support

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производитель	NXP [NXP Semiconductors]

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TDA9989_2

Product data sheet

Rev. 02 — 11 June 2009

8 of 48

NXP Semiconductors

TDA9989

HDMI 1.3a transmitter with CEC support

The TDA9989 can accept any of the following video input modes (see Table 6):

• RGB, with 8-bit for each component

• YCbCr 4:4:4, with 8-bit for each component

• YCbCr 4:2:2 semi-planar, with up to 12-bit for each component (YCbCr)

• YCbCr 4:2:2 ITU656, with up to 12-bit data depth

The TDA9989 can be set to latch data at either rising or falling edge, or both.

7.2.2 Internal assignment

The aim of the video input processor is to internally map the incoming data to the

corresponding mode, which can be handled by the video processing. The internal signal

named VP[23:0] is assigned depending on the input mode as deﬁned below.

Fig 4.

Internal assignment of VP[23:0]

Table 3.

Internal assignment

Internal port

RGB

YCbCr 4 :4:4

YCbCr 4 :2:2

semi-planar

YCbCr 4 :2:2

ITU656

VP[23]

G[7]

Y[7]

Y[11]

YCbCr[11]

VP[22]

G[6]

Y[6]

Y[10]

YCbCr[10]

VP[21]

G[5]

Y[5]

Y[9]

YCbCr[9]

VP[20]

G[4]

Y[4]

Y[8]

YCbCr[8]

VP[19]

G[3]

Y[3]

Y[7]

YCbCr[7]

VP[18]

G[2]

Y[2]

Y[6]

YCbCr[6]

VP[17]

G[1]

Y[1]

Y[5]

YCbCr[5]

VP[16]

G[0]

Y[0]

Y[4]

YCbCr[4]

VP[15]

B[7]

Cb[7]

Y[3]

YCbCr[3]

VP[14]

B[6]

Cb[6]

Y[2]

YCbCr[2]

VP[13]

B[5]

Cb[5]

Y[1]

YCbCr[1]

VP[12]

B[4]

Cb[4]

Y[0]

YCbCr[0]

VIDEO

INPUT

PROCESSOR

001aah028

VPA[7:0]

VPB[7:0]

VP[23:0]

VPC[7:0]

Аналогичный номер детали - TDA9989

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NXP Semiconductors	TDA9981B	193Kb / 41P	HDMI transmitter up to 150 MHz pixel rate with 3 쨈 8-bit video inputs and 4 X I2S-bus with S/PDIF Rev. 01-4 July 2008
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	TDA9981BHL/8/C1XX	193Kb / 41P	HDMI transmitter up to 150 MHz pixel rate with 3 쨈 8-bit video inputs and 4 X I2S-bus with S/PDIF Rev. 01-4 July 2008
	TDA9983A	63Kb / 9P	HDMI transmitter up to 150 MHz pixel rate with 3 쨈 8-bit video inputs and 4 쨈 I2S-bus with S/PDIF Rev. 01-13 March 2008

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