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UC1849 датащи(PDF) 4 Page - Texas Instruments |
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UC1849 датащи(HTML) 4 Page - Texas Instruments |
4 / 11 page PARAMETER TEST CONDITION MIN TYP MAX UNITS VREF Comparator Turn-on threshold 4.65 V Hysteresis 0.4 V VCC Comparator Turn-on Threshold 7.9 8.3 8.7 V Hysteresis 0.4 V KILL Comparator Voltage Threshold 3V Sequence Comparator Voltage Threshold 2.5 V SEQ SAT IO = 10mA 0.25 V Enable Comparator Voltage Threshold 2.5 V RUN SAT IO = 10mA 0.25 V Reference VREF TA = 25 °C 4.95 5 5.05 V VREF VCC = 15V 4.9 5.1 V Line Regulation 10 < VCC < 20 3 15 mV Load Regulation 0 < Io < 10mA 3 15 mV Short Circuit I VREF = 0V 30 60 90 mA Output Stage Rise Time CL = 100pF 10 20 ns Fall Time CL = 100pF 10 20 ns Voh VCC > 11V, IO = −10mA 8.0 8.4 8.8 V IO = −200mA 7.8 V Vol IO = 200mA 3.0 V IO = 10mA 0.5 V Virtual Ground VGND-VEE VEE is externally supplied, GND is floating 0.2 0.75 V and used as Signal GND. Icc Icc (run) 21 30 mA 4 UC1849 UC2849 UC3849 Note 1: If a closed loop gain greater than 1 is used, the possible GBW will increase by a factor of ACL + 10; where ACL is the closed loop gain. Note 2: Guaranteed by design. Not 100% tested in production. Note 3: Unless otherwise specified all voltages are with respect to GND. Currents are positive into, negative out of the specified terminal. ELECTRICAL CHARACTERISTICS (cont)Unless otherwise stated these specifications apply for TA = −55°Cto +125°C for UC1849; −40 °C to +85°C for UC2849; and 0°C to +70°C for UC3849;VCC = 12V, VEE = GND, Output no load, CT = 345pF, RT = 4530 Ω, RDEAD = 511Ω, RCLKSYN = 1k, TA = TJ. PIN DESCRIPTIONS ADJ: The output of the transconductance (gm = −1mS) amplifier adjusts the control voltage to maintain equal current sharing. The chip sensing the highest output cur- rent will have its output clamped to 1V. A resistor divider between VREF and ADJ drives the control voltage (VA+) for the voltage amplifier. Each slave unit’s ADJ voltage increases (to a maximum of 6V) its control voltage (VA+) until its load current is equal to the master. The 60mV input offset on the gm amplifier guarantees that the unit sensing the highest load current is chosen as the mas- ter. The 60mV offset guarantees by design to be greater than the inherent offset of the gm amplifier and the buffer amplifier. While the 60mV offset represents an error in current sharing, the gain of the current and 2X amplifiers reduces it to only 30mV. This pin needs a 1 µF capacitor to compensate the amplifier. CA-: The inverting input to the current error amplifier. This amplifier needs a capacitor between CA- and CAO to set its dominant pole. |
Аналогичный номер детали - UC1849 |
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Аналогичное описание - UC1849 |
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