поискавой системы для электроныых деталей |
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TCA9535PWR датащи(PDF) 11 Page - Texas Instruments |
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TCA9535PWR датащи(HTML) 11 Page - Texas Instruments |
11 / 32 page 1 2 SCL 3 4 5 6 7 8 SDA A A A Data 0 Data to Register R/W 9 0 0 0 0 0 0 1 1 MSB LSB Data 1 MSB LSB A Data to Register S 0 1 0 0 A2 A1 A0 0 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 P Acknowledge From Slave Acknowledge From Slave Start Condition Command Byte Slave Address Acknowledge From Slave Reads 0 0 A2 A1 A0 0 1 0 0 A2 A1 A0 0 1 S 0 A A A R/W A P NA S R/W 1 MSB LSB MSB LSB Slave Address Acknowledge From Slave Command Byte Data From Upper or Lower Byte of Register Last Byte Data Acknowledge From Slave Acknowledge From Slave Slave Address Data From Lower or Upper Byte of Register First Byte Data No Acknowledge From Master Acknowledge From Master At this moment, master transmitter becomes master receiver, and slave receiver becomes slave transmitter. TCA9535 www.ti.com........................................................................................................................................... SCPS201A – AUGUST 2009 – REVISED SEPTEMBER 2009 Figure 7. Write to Configuration Registers The bus master first must send the TCA9535 address with the least-significant bit set to a logic 0 (see Figure 4 for device address). The command byte is sent after the address and determines which register is accessed. After a restart, the device address is sent again, but this time, the least-significant bit is set to a logic 1. Data from the register defined by the command byte then is sent by the TCA9535 (see Figure 8 through Figure 10). After a restart, the value of the register defined by the command byte matches the register being accessed when the restart occurred. For example, if the command byte references Input Port 1 before the restart, and the restart occurs when Input Port 0 is being read, the stored command byte changes to reference Input Port 0. The original command byte is forgotten. If a subsequent restart occurs, Input Port 0 is read first. Data is clocked into the register on the rising edge of the ACK clock pulse. After the first byte is read, additional bytes may be read, but the data now reflect the information in the other register in the pair. For example, if Input Port 1 is read, the next byte read is Input Port 0. Data is clocked into the register on the rising edge of the ACK clock pulse. There is no limitation on the number of data bytes received in one read transmission, but when the final byte is received, the bus master must not acknowledge the data Figure 8. Read From Register <br/> Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): TCA9535 |
Аналогичный номер детали - TCA9535PWR |
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Аналогичное описание - TCA9535PWR |
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